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24-WQFN Exposed Pad
Integrated Circuits (ICs)

DS100BR210SQE/NOPB

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Texas Instruments

10.3-GBPS LOW POWER 2-CH REDRIVER W/ INPUT EQUALIZATION AND OUTPUT DE-EMPHASIS

24-WQFN Exposed Pad
Integrated Circuits (ICs)

DS100BR210SQE/NOPB

Active
Texas Instruments

10.3-GBPS LOW POWER 2-CH REDRIVER W/ INPUT EQUALIZATION AND OUTPUT DE-EMPHASIS

Technical Specifications

Parameters and characteristics for this part

SpecificationDS100BR210SQE/NOPB
ApplicationsSATA
Current - Supply50 mA
Data Rate (Max)10.3 Gbps
Delay Time230 ps
InputCML
Mounting TypeSurface Mount
Number of Channels [custom]2
Operating Temperature [Max]85 °C
Operating Temperature [Min]-40 °C
OutputCML
Package / Case24-WFQFN Exposed Pad
Signal ConditioningInput Equalization, Output De-Emphasis
Supplier Device Package24-WQFN (4x4)
TypeReDriver, Buffer
Voltage - Supply [Max]3.6 V
Voltage - Supply [Min]2.375 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyCut Tape (CT) 1$ 10.61
10$ 9.75
25$ 9.34
100$ 8.23
Digi-Reel® 1$ 10.61
10$ 9.75
25$ 9.34
100$ 8.23
Tape & Reel (TR) 250$ 7.83
500$ 7.32
1250$ 6.72
Texas InstrumentsSMALL T&R 1$ 8.91
100$ 7.26
250$ 5.71
1000$ 4.84

Description

General part information

DS100BR210 Series

The DS100BR210 is an extremely low power, high performance repeater designed to support serial links with data rates up to 10.3 Gbps. The DS100BR210 pinout is configured as two unidirectional channels. The DS100BR210 inputs feature a powerful 4-stage continuous time linear equalizer (CTLE) to provide a boost of up to +36 dB at 5 GHz and open an input eye that is completely closed due to inter-symbol interference (ISI) induced by the interconnect mediums such as board traces or twin-axial copper cables. The transmitter features a programmable output de-emphasis driver with up to –12 dB and can drive output voltage levels from 700 mVp-p to 1300 mVp-p.

When configured as a 10G-KR repeater, the DS100BR210 allows the KR host and the end point to optimize the full link by adjusting transmit and receive equalizer coefficients using back-channel communication techniques specified by the 802.3ap Ethernet standard.

The programmable settings can be applied via pin control, SMBus protocol, or an external EEPROM. In the EEPROM mode, the configuration information is automatically loaded on power up, thereby eliminating the need for an external microprocessor or software driver.