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ROHM 2SCR542F3TR
Discrete Semiconductor Products

2SAR563F3TR

Active
Rohm Semiconductor

SMALL AND EXCELLENT THERMAL CONDUCTIVITY, PNP -6A -50V MIDDLE POWER TRANSISTOR

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ROHM 2SCR542F3TR
Discrete Semiconductor Products

2SAR563F3TR

Active
Rohm Semiconductor

SMALL AND EXCELLENT THERMAL CONDUCTIVITY, PNP -6A -50V MIDDLE POWER TRANSISTOR

Technical Specifications

Parameters and characteristics for this part

Specification2SAR563F3TR
Current - Collector Cutoff (Max) [Max]1 µA
DC Current Gain (hFE) (Min) @ Ic, Vce [Min]180
Frequency - Transition200 MHz
Mounting TypeSurface Mount
Operating Temperature150 °C
Package / Case3-UDFN Exposed Pad
Power - Max [Max]1 W
Supplier Device PackageHUML2020L3
Transistor TypePNP
Vce Saturation (Max) @ Ib, Ic400 mV
Voltage - Collector Emitter Breakdown (Max) [Max]50 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyN/A 5619$ 1.43
NewarkEach (Supplied on Cut Tape) 1$ 1.41
10$ 0.92
25$ 0.82
50$ 0.71
100$ 0.61
250$ 0.55
500$ 0.49
1000$ 0.44

Description

General part information

2SAR563F3 Series

2SAR563F3 is a middle power transistor with Low VCE(sat), suitable for low frequency amplifier. HUML2020L3 (DFN2020-3S) is a small leadless surface mount package with excellent thermal and electrical conductivity.

Documents

Technical documentation and resources

Technical Data Sheet EN

Datasheet

How to Use LTspice® Models

Schematic Design & Verification

Importance of Probe Calibration When Measuring Power: Deskew

Schematic Design & Verification

How to Create Symbols for PSpice Models

Models

Anti-Whisker formation - Transistors

Package Information

Part Explanation

Application Note

Moisture Sensitivity Level - Transistors

Package Information

Calculation of Power Dissipation in Switching Circuit

Schematic Design & Verification

Two-Resistor Model for Thermal Simulation

Thermal Design

What Is Thermal Design

Thermal Design

Certificate of not containing SVHC under REACH Regulation

Environmental Data

Package Dimensions

Package Information

Compliance of the RoHS directive

Environmental Data

PCB Layout Thermal Design Guide

Thermal Design

About Flammability of Materials

Environmental Data

2SAR563F3 Thermal Resistance

Characteristics Data

What is a Thermal Model? (Transistor)

Thermal Design

Notes for Temperature Measurement Using Forward Voltage of PN Junction

Thermal Design

List of Transistor Package Thermal Resistance

Thermal Design

Types and Features of Transistors

Application Note

Condition of Soldering / Land Pattern Reference

Package Information

Notes for Calculating Power Consumption:Static Operation

Thermal Design

Reliability Test Result

Manufacturing Data

Method for Calculating Junction Temperature from Transient Thermal Resistance Data

Thermal Design

Measurement Method and Usage of Thermal Resistance RthJC

Thermal Design

Basics of Thermal Resistance and Heat Dissipation

Thermal Design

Precautions When Measuring the Rear of the Package with a Thermocouple

Thermal Design

About Export Regulations

Export Information

How to Use LTspice® Models: Tips for Improving Convergence

Schematic Design & Verification

Impedance Characteristics of Bypass Capacitor

Schematic Design & Verification

Method for Monitoring Switching Waveform

Schematic Design & Verification

Notes for Temperature Measurement Using Thermocouples

Thermal Design

Explanation for Marking

Package Information

2SAR563F3 ESD Data

Characteristics Data

Inner Structure

Package Information

Temperature derating method for Safe Operating Area (SOA)

Schematic Design & Verification

Overview of ROHM's Simulation Models(for ICs and Discrete Semiconductors)

Technical Article