Integrated Circuits (ICs)

MT52L512M32D2PF-093 WT:B TR

Obsolete

DRAM, MOBILE LPDDR3, 16 GBIT, 512M X 32BIT, 1.066 GHZ, 178 PINS, FBGA

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Integrated Circuits (ICs)

Obsolete

DRAM, MOBILE LPDDR3, 16 GBIT, 512M X 32BIT, 1.066 GHZ, 178 PINS, FBGA

Technical Specifications

Parameters and characteristics for this part

Part	Supplier Device Package [y]	Supplier Device Package [x]	Supplier Device Package	Voltage - Supply	Operating Temperature [Max]	Operating Temperature [Min]	Mounting Type	Technology	Memory Organization [custom]	Memory Organization [custom]	Memory Type	Package / Case	Memory Format	Clock Frequency	Memory Organization	Memory Size
Micron Technology Inc. MT52L512M32D2PF-093 WT:B TR	11	11.5	178-FBGA	1.2 V	85 °C	-30 °C	Surface Mount	SDRAM - Mobile LPDDR3	32	512 M	Volatile	178-VFBGA	DRAM	1067 MHz
Micron Technology Inc. MT52L512M64D4PQ-093 WT:B TR			253-VFBGA (11x11.5)	1.2 V	85 °C	-30 °C	Surface Mount	SDRAM - Mobile LPDDR3			Volatile	253-VFBGA	DRAM	1067 MHz	512M x 64	4 MB
Micron Technology Inc. MT52L512M64D4GN-107 WT:B TR			256-FBGA (14x14)	1.2 V	85 °C	-30 °C	Surface Mount	SDRAM - Mobile LPDDR3			Volatile	256-WFBGA	DRAM	933 MHz	512M x 64	4 MB
Micron Technology Inc. MT52L512M64D4PQ-107 WT:B			253-VFBGA (11x11.5)	1.2 V	85 °C	-30 °C	Surface Mount	SDRAM - Mobile LPDDR3			Volatile	253-VFBGA	DRAM	933 MHz	512M x 64	4 MB
Micron Technology Inc. MT52L512M32D2PF-093 WT:B	11	11.5	178-FBGA	1.2 V	85 °C	-30 °C	Surface Mount	SDRAM - Mobile LPDDR3	32	512 M	Volatile	178-VFBGA	DRAM	1067 MHz
Micron Technology Inc. MT52L512M32D2PF-093 WT ES:B TR	11	11.5	178-FBGA	1.2 V	85 °C	-30 °C	Surface Mount	SDRAM - Mobile LPDDR3	32	512 M	Volatile	178-VFBGA	DRAM	1067 MHz
Micron Technology Inc. MT52L512M64D4PQ-107 WT:B TR			253-VFBGA (11x11.5)	1.2 V	85 °C	-30 °C	Surface Mount	SDRAM - Mobile LPDDR3			Volatile	253-VFBGA	DRAM	933 MHz	512M x 64	4 MB

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

Distributor	Package	Quantity	$

Digikey	N/A	0	$ 0.00

General part information

8 internal banks for concurrent operation, burst length: 8, on-die termination ODT)

Ultra-low-voltage core and I/O power supplies, 8n prefetch DDR architecture

Multiplexed, double data rate, command/address inputs; commands entered on each CK_t/CK_c edge

Technical documentation and resources

No documents available