Specification	SN74AHC126DBR

Current - Output High, Low [custom]	8 mA
Current - Output High, Low [custom]	8 mA
Logic Type	Buffer, Non-Inverting
Mounting Type	Surface Mount
Number of Bits per Element	1
Number of Elements	4
Operating Temperature [Max]	85 °C
Operating Temperature [Min]	-40 °C
Output Type	3-State
Package / Case	5.3 mm
Package / Case	14-SSOP
Package / Case	0.209 "
Supplier Device Package	14-SSOP
Voltage - Supply [Max]	5.5 V
Voltage - Supply [Min]	2 V

SN74AHC126 Series

4-ch, 2-V to 5.5-V buffers with 3-state outputs

Part	Package / Case [x]	Package / Case [y]	Package / Case	Mounting Type	Current - Output High, Low [custom]	Current - Output High, Low [custom]	Output Type	Number of Bits per Element	Voltage - Supply [Max]	Voltage - Supply [Min]	Operating Temperature [Max]	Operating Temperature [Min]	Number of Elements	Logic Type	Package / Case [custom]	Package / Case [custom]	Supplier Device Package	Package / Case	Package / Case
Texas Instruments SN74AHC126DG4	0.154 in	3.9 mm	14-SOIC	Surface Mount	8 mA	8 mA	3-State	1	5.5 V	2 V	85 °C	-40 °C	4	Buffer Non-Inverting
Texas Instruments SN74AHC126DR	0.154 in	3.9 mm	14-SOIC	Surface Mount	8 mA	8 mA	3-State	1	5.5 V	2 V	85 °C	-40 °C	4	Buffer Non-Inverting
Texas Instruments SN74AHC126PW			14-TSSOP	Surface Mount	8 mA	8 mA	3-State	1	5.5 V	2 V	85 °C	-40 °C	4	Buffer Non-Inverting	0.173 "	4.4 mm	14-TSSOP
Texas Instruments SN74AHC126D	0.154 in	3.9 mm	14-SOIC	Surface Mount	8 mA	8 mA	3-State	1	5.5 V	2 V	85 °C	-40 °C	4	Buffer Non-Inverting
Texas Instruments SN74AHC126DBR			14-SSOP	Surface Mount	8 mA	8 mA	3-State	1	5.5 V	2 V	85 °C	-40 °C	4	Buffer Non-Inverting			14-SSOP	5.3 mm	0.209 "
Texas Instruments SN74AHC126BQAR			14-WFQFN Exposed Pad	Surface Mount	8 mA	8 mA	3-State	1	5.5 V	2 V	85 °C	-40 °C	4	Buffer Non-Inverting			14-WQFN (3x2.5)
Texas Instruments SN74AHC126PWRG4			14-TSSOP	Surface Mount	8 mA	8 mA	3-State	1	5.5 V	2 V	85 °C	-40 °C	4	Buffer Non-Inverting	0.173 "	4.4 mm	14-TSSOP
Texas Instruments SN74AHC126NSR	0.209 "	5.3 mm	14-SOIC	Surface Mount	8 mA	8 mA	3-State	1	5.5 V	2 V	85 °C	-40 °C	4	Buffer Non-Inverting			14-SO

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

Distributor	Package	Quantity	$

Digikey	Cut Tape (CT)	1	$ 0.49
		10	$ 0.39
		25	$ 0.36
		100	$ 0.27
		250	$ 0.24
		500	$ 0.20
		1000	$ 0.15
	Digi-Reel®	1	$ 0.49
		10	$ 0.39
		25	$ 0.36
		100	$ 0.27
		250	$ 0.24
		500	$ 0.20
		1000	$ 0.15
	Tape & Reel (TR)	2000	$ 0.10
LCSC	Piece	1	$ 0.23
		10	$ 0.23
		30	$ 0.22
		100	$ 0.22
Texas Instruments	LARGE T&R	1	$ 0.28
		100	$ 0.19
		250	$ 0.15
		1000	$ 0.10

Description

General part information

SN74AHC126 Series

The SNx4AHC126 devices are quadruple bus buffer gates featuring independent line drivers with 3-state outputs.

For the high-impedance state during power up or power down, OE can be tied to GND through a pull-down resistor; the minimum value of the resistor is determined by the current-sourcing capability of the drive.

The SNx4AHC126 devices are quadruple bus buffer gates featuring independent line drivers with 3-state outputs.

Documents

Technical documentation and resources

Benefits & Issues of Migrating 5-V and 3.3-V Logic to Lower-Voltage Supplies (Rev. A)

Application note

Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A)

Application note

Military Advanced High-Speed CMOS Logic (AHC/AHCT) (Rev. C)

Product overview

SN74AHC126DBR

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SN74AHC126DBR

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Technical Specifications

SN74AHC126 Series

Pricing

Description

SN74AHC126 Series

Documents

Advanced High-Speed CMOS (AHC) Logic Family (Rev. C)

LOGIC Pocket Data Book (Rev. B)

How to Select Little Logic (Rev. A)

CMOS Power Consumption and CPD Calculation (Rev. B)

Logic Guide (Rev. AB)

Texas Instruments Little Logic Application Report

SNx4AHC126 Quadruple Bus Buffer Gates with 3-State Outputs datasheet (Rev. N)

Migration From 3.3-V To 2.5-V Power Supplies For Logic Devices

Design Summary for WCSP Little Logic (Rev. B)

Little Logic Guide 2018 (Rev. G)

Selecting the Right Level Translation Solution (Rev. A)

Semiconductor Packing Material Electrostatic Discharge (ESD) Protection

Implications of Slow or Floating CMOS Inputs (Rev. E)

AHC/AHCT Designer's Guide February 2000 (Rev. D)

Live Insertion

TI IBIS File Creation, Validation, and Distribution Processes

Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)

Benefits & Issues of Migrating 5-V and 3.3-V Logic to Lower-Voltage Supplies (Rev. A)

Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A)

Military Advanced High-Speed CMOS Logic (AHC/AHCT) (Rev. C)

SN74AHC126 Series