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Integrated Circuits (ICs)

SN74ABTH18646APM

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Texas Instruments

SCAN TEST DEVICES WITH 18-BIT TRANSCEIVERS AND REGISTERS

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Integrated Circuits (ICs)

SN74ABTH18646APM

Active
Texas Instruments

SCAN TEST DEVICES WITH 18-BIT TRANSCEIVERS AND REGISTERS

Technical Specifications

Parameters and characteristics for this part

SpecificationSN74ABTH18646APM
Logic TypeScan Test Device With Transceivers And Registers
Mounting TypeSurface Mount
Operating Temperature [Max]85 °C
Operating Temperature [Min]-40 °C
Package / Case64-LQFP
Supplier Device Package64-LQFP (10x10)
Supply Voltage [Max]5.5 V
Supply Voltage [Min]4.5 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyTray 1$ 19.41
10$ 17.84
25$ 17.10
160$ 15.06
320$ 14.32
480$ 13.40
Texas InstrumentsJEDEC TRAY (10+1) 1$ 17.47
100$ 15.26
250$ 11.77
1000$ 10.52

Description

General part information

SN74ABTH18646A Series

The 'ABTH18646A and 'ABTH182646A scan test devices with 18-bit bus transceivers and registers are members of the Texas Instruments SCOPETMtestability integrated-circuit family. This family of devices supports IEEE Standard 1149.1-1990 boundary scan to facilitate testing of complex circuit-board assemblies. Scan access to the test circuitry is accomplished via the 4-wire test access port (TAP) interface.

In the normal mode, these devices are 18-bit bus transceivers and registers that allow for multiplexed transmission of data directly from the input bus or from the internal registers. They can be used either as two 9-bit transceivers or one 18-bit transceiver. The test circuitry can be activated by the TAP to take snapshot samples of the data appearing at the device pins or to perform a self test on the boundary-test cells. Activating the TAP in the normal mode does not affect the functional operation of the SCOPETMbus transceivers and registers.

Transceiver function is controlled by output-enable () and direction (DIR) inputs. Whenis low, the transceiver is active and operates in the A-to-B direction when DIR is high or in the B-to-A direction when DIR is low. Whenis high, both the A and B outputs are in the high-impedance state, effectively isolating both buses.

Documents

Technical documentation and resources

Selecting the Right Level Translation Solution (Rev. A)

Application note

Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)

Application note

Power-Up 3-State (PU3S) Circuits in TI Standard Logic Devices

Application note

Semiconductor Packing Material Electrostatic Discharge (ESD) Protection

Application note

Logic Guide (Rev. AB)

Selection guide

Understanding Advanced Bus-Interface Products Design Guide

Application note

An Overview of Bus-Hold Circuit and the Applications (Rev. B)

Application note

Programming CPLDs Via the 'LVT8986 LASP

Application note

Advanced Bus Interface Logic Selection Guide

Selection guide

Advanced BiCMOS Technology (ABT) Logic Enables Optimal System Design (Rev. A)

Application note

Designing With Logic (Rev. C)

Application note

Advanced BiCMOS Technology (ABT) Logic Characterization Information (Rev. B)

Application note

LOGIC Pocket Data Book (Rev. B)

User guide

Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A)

Application note

Live Insertion

Application note

TI IBIS File Creation, Validation, and Distribution Processes

Application note

Implications of Slow or Floating CMOS Inputs (Rev. E)

Application note

Input and Output Characteristics of Digital Integrated Circuits

Application note

Family of Curves Demonstrating Output Skews for Advanced BiCMOS Devices (Rev. A)

Application note

Scan Test Devices With 18-Bit Transceivers And Registers datasheet (Rev. D)

Data sheet

LASP Demo Board User's Guide

EVM User's guide

Quad Flatpack No-Lead Logic Packages (Rev. D)

Application note