
NB6N14SMNR2G
ActiveCLOCK BUFFER, FANOUT, TRANSLATOR, 2 GHZ TO 4 OUTPUTS, 3 V TO 3.6 V, 16 PINS, QFN-EP
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NB6N14SMNR2G
ActiveCLOCK BUFFER, FANOUT, TRANSLATOR, 2 GHZ TO 4 OUTPUTS, 3 V TO 3.6 V, 16 PINS, QFN-EP
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Technical Specifications
Parameters and characteristics for this part
| Specification | NB6N14SMNR2G |
|---|---|
| Differential - Input:Output [custom] | True |
| Differential - Input:Output [custom] | True |
| Frequency - Max [Max] | 2 GHz |
| Mounting Type | Surface Mount |
| Number of Circuits | 1 |
| Operating Temperature [Max] | 85 °C |
| Operating Temperature [Min] | -40 °C |
| Output | LVDS |
| Package / Case | 16-VFQFN Exposed Pad |
| Ratio - Input:Output | 1:4 |
| Supplier Device Package | 16-QFN (3x3) |
| Type | Fanout Buffer (Distribution), Translator |
| Voltage - Supply [Max] | 3.6 V |
| Voltage - Supply [Min] | 3 V |
Pricing
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Description
General part information
NB6N14S Series
The NB6N14S is a differential 1:4 Clock or Data Receiver and will accept AnyLevel input signals: LVPECL, CML, HCSL, LVCMOS, LVTTL, or LVDS. These signals will be translated to LVDS and four identical copies of Clock or Data will be distributed, operating up to 2.0 GHz or 2.5 Gb/s, respectively. As such, the NB6N14S is ideal for SONET, GigE, Fiber Channel, Backplane and other Clock or Data distribution applications. The NB6N14S has a wide input common mode range from GND + 50mV to VCC - 50mV. Combined with the 50-ohm internal termination resistors at the inputs, the NB6N14S is ideal for translating a variety of differential or single-ended Clock or Data signals to 350mV typical LVDS output levels. The NB6N14S is offered in a small 3mm X 3mm 16-QFN package. Application notes, models, and support documentation are available at www.onsemi.com.
Documents
Technical documentation and resources