Integrated Circuits (ICs)

SN74ALVCH16821DL

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3.3-V 20-BIT BUS-INTERFACE FLIP-FLOP WITH 3-STATE OUTPUTS

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Search across all available documentation for this part.

Documents16-Bit Widebus Logic Families in 56-Ball, 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B)Understanding Advanced Bus-Interface Products Design Guide +18

Integrated Circuits (ICs)

SN74ALVCH16821DL

Active

Texas Instruments

3.3-V 20-BIT BUS-INTERFACE FLIP-FLOP WITH 3-STATE OUTPUTS

Deep-Dive with AI

Documents16-Bit Widebus Logic Families in 56-Ball, 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B)Understanding Advanced Bus-Interface Products Design Guide +18

Specifications Series Pricing Description Documents

Technical Specifications

Parameters and characteristics for this part

Specification	SN74ALVCH16821DL

Clock Frequency	150 MHz
Current - Output High, Low	24 mA
Function	Standard
Input Capacitance	3.5 pF
Max Propagation Delay @ V, Max CL	4.5 ns
Mounting Type	Surface Mount
Number of Bits per Element	10
Number of Elements	2
Operating Temperature [Max]	85 °C
Operating Temperature [Min]	-40 °C
Output Type	Tri-State, Non-Inverted
Package / Case	0.295 in
Package / Case	56-BSSOP
Package / Case	7.5 mm
Supplier Device Package	56-SSOP
Trigger Type	Positive Edge
Type	D-Type
Voltage - Supply [Max]	3.6 V
Voltage - Supply [Min]	1.65 V

SN74ALVCH16821 Series

3.3-V 20-Bit Bus-Interface Flip-Flop with 3-State Outputs

Part	Output Type	Number of Elements	Input Capacitance	Max Propagation Delay @ V, Max CL	Clock Frequency	Function	Package / Case	Package / Case	Package / Case	Operating Temperature [Max]	Operating Temperature [Min]	Mounting Type	Current - Output High, Low	Supplier Device Package	Number of Bits per Element	Voltage - Supply [Min]	Voltage - Supply [Max]	Type	Trigger Type
Texas Instruments SN74ALVCH16821DL	Non-Inverted Tri-State	2	3.5 pF	4.5 ns	150 MHz	Standard	0.295 in	56-BSSOP	7.5 mm	85 °C	-40 °C	Surface Mount	24 mA	56-SSOP	10	1.65 V	3.6 V	D-Type	Positive Edge
Texas Instruments SN74ALVCH16821DLR	Non-Inverted Tri-State	2	3.5 pF	4.5 ns	150 MHz	Standard	0.295 in	56-BSSOP	7.5 mm	85 °C	-40 °C	Surface Mount	24 mA	56-SSOP	10	1.65 V	3.6 V	D-Type	Positive Edge
Texas Instruments SN74ALVCH16821DGG

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

Distributor	Package	Quantity	$

Digikey	Tube	240	$ 4.09
Texas Instruments	TUBE	1	$ 4.03
		100	$ 3.29
		250	$ 2.58
		1000	$ 2.19

Description

General part information

SN74ALVCH16821 Series

This 20-bit bus-interface flip-flop is designed for 1.65-V to 3.6-V VCCoperation.

The SN74ALVCH16821 can be used as two 10-bit flip-flops or one 20-bit flip-flop. The 20 flip-flops are edge-triggered D-type flip-flops. On the positive transition of the clock (CLK) input, the device provides true data at the Q outputs.

A buffered output-enable (OE)\ input can be used to place the ten outputs in either a normal logic state (high or low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without need for interface or pullup components.

Documents

Technical documentation and resources

SN74ALVCH16821DL

Deep-Dive with AI

SN74ALVCH16821DL

Deep-Dive with AI

Technical Specifications

SN74ALVCH16821 Series

Pricing

Description

SN74ALVCH16821 Series

Documents

16-Bit Widebus Logic Families in 56-Ball, 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B)

Understanding Advanced Bus-Interface Products Design Guide

Migration From 3.3-V To 2.5-V Power Supplies For Logic Devices

CMOS Power Consumption and CPD Calculation (Rev. B)

TI SN74ALVC16835 Component Specification Analysis for PC100

Standard Linear & Logic for PCs, Servers & Motherboards

Power-Up Behavior of Clocked Devices (Rev. B)

Semiconductor Packing Material Electrostatic Discharge (ESD) Protection

Benefits & Issues of Migrating 5-V and 3.3-V Logic to Lower-Voltage Supplies (Rev. A)

SN74ALVCH16821 datasheet (Rev. F)

Logic Solutions for PC-100 SDRAM Registered DIMMs (Rev. A)

Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)

Input and Output Characteristics of Digital Integrated Circuits

ALVC Advanced Low-Voltage CMOS Including SSTL, HSTL, And ALB (Rev. B)

An Overview of Bus-Hold Circuit and the Applications (Rev. B)

Live Insertion

Logic Guide (Rev. AB)

Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A)

LOGIC Pocket Data Book (Rev. B)

TI IBIS File Creation, Validation, and Distribution Processes

SN74ALVCH16821 Series