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Deep-Dive with AI
Technical Specifications
Parameters and characteristics for this part
| Specification | ADS8481IBRGZT |
|---|---|
| Architecture | SAR |
| Configuration | S/H-ADC |
| Data Interface | Parallel |
| Input Type | Single Ended, Pseudo-Differential |
| Mounting Type | Surface Mount |
| Number of A/D Converters | 1 |
| Number of Inputs | 1 |
| Operating Temperature [Max] | 85 °C |
| Operating Temperature [Min] | -40 °C |
| Package / Case | 48-VFQFN Exposed Pad |
| Ratio - S/H:ADC | 1:1 |
| Reference Type | External, Internal |
| Sampling Rate (Per Second) | 1 M |
| Supplier Device Package | 48-VQFN (7x7) |
| Voltage - Supply, Analog | 5 V |
| Voltage - Supply, Digital [Max] | 5.25 V |
| Voltage - Supply, Digital [Min] | 2.7 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | Cut Tape (CT) | 1 | $ 50.73 | |
| Digi-Reel® | 1 | $ 50.73 | ||
| Tape & Reel (TR) | 250 | $ 39.68 | ||
| Texas Instruments | SMALL T&R | 1 | $ 42.93 | |
| 100 | $ 38.16 | |||
| 250 | $ 31.37 | |||
| 1000 | $ 28.06 | |||
Description
General part information
ADS8481 Series
The ADS8481 is an 18-bit, 1-MSPS A/D converter with an internal 4.096-V reference and a pseudo-differential unipolar single-ended input. The device includes a 18-bit capacitor-based SAR A/D converter with inherent sample and hold. The ADS8481 offers a full 18-bit interface, a 16-bit option where data is read using two read cycles, or an 8-bit bus option using three read cycles.
The ADS8481 is available in a 7x7 QFN package and is characterized over the industrial -40°C to 85°C temperature range.
The ADS8481 is an 18-bit, 1-MSPS A/D converter with an internal 4.096-V reference and a pseudo-differential unipolar single-ended input. The device includes a 18-bit capacitor-based SAR A/D converter with inherent sample and hold. The ADS8481 offers a full 18-bit interface, a 16-bit option where data is read using two read cycles, or an 8-bit bus option using three read cycles.
Documents
Technical documentation and resources