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14-SOIC
Integrated Circuits (ICs)

TLC556MDR

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Texas Instruments

IC OSC TIMER DUAL 2.1MHZ 14-SOIC

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14-SOIC
Integrated Circuits (ICs)

TLC556MDR

Active
Texas Instruments

IC OSC TIMER DUAL 2.1MHZ 14-SOIC

Technical Specifications

Parameters and characteristics for this part

SpecificationTLC556MDR
Frequency2.1 MHz
Mounting TypeSurface Mount
Operating Temperature [Max]125 °C
Operating Temperature [Min]-55 °C
Package / Case14-SOIC
Package / Case [x]0.154 in
Package / Case [y]3.9 mm
Type555 Type, Timer/Oscillator (Dual)
Voltage - Supply [Max]15 V
Voltage - Supply [Min]5 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyCut Tape (CT) 1$ 3.06
10$ 1.99
25$ 1.71
100$ 1.39
250$ 1.24
500$ 1.14
1000$ 1.07
Digi-Reel® 1$ 3.06
10$ 1.99
25$ 1.71
100$ 1.39
250$ 1.24
500$ 1.14
1000$ 1.07
Tape & Reel (TR) 2500$ 0.98
5000$ 0.93
7500$ 0.91
Texas InstrumentsLARGE T&R 1$ 1.91
100$ 1.47
250$ 1.08
1000$ 0.78

Description

General part information

TLC556 Series

The TLC556 series are monolithic timing circuits fabricated using the TI LinCMOS™ process, which provides full compatibility with CMOS, TTL, and MOS logic and operates at frequencies up to 2MHz. Because of high input impedance, this device supports smaller timing capacitors than those supported by the NE556. As a result, more accurate time delays and oscillations are possible. Power consumption is low across the full range of power supply voltages.

Like the NE556, the TLC556 has a trigger level equal to approximately one-third of the supply voltage and a threshold level equal to approximately two-thirds of the supply voltage. These levels can be altered by use of the control voltage pin (CONT). When the trigger input (TRIG) is less than the trigger level, the flip-flop is set and the output goes high. If TRIG is greater than the trigger level and the threshold input (THRES) is greater than the threshold level, the flip-flop is reset and the output is low. The reset input (RESET) overrides all other inputs and is used to initiate a new timing cycle. If RESET is low, the flip-flop is reset and the output is low. Whenever the output is low, a low-impedance path is provided between the discharge pin (DISCH) and the ground pin (GND). Tie all unused inputs to an appropriate logic level to prevent false triggering.

Although the CMOS output is capable of sinking over 100mA and sourcing over 10mA, the TLC556 exhibits greatly reduced supply-current spikes during output transitions. This feature minimizes the need for the large decoupling capacitors required by the NE556.

Documents

Technical documentation and resources