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38-TSSOP
Integrated Circuits (ICs)

SN65LVDS108DBTR

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Texas Instruments

1:8 LVDS CLOCK FANOUT BUFFER

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38-TSSOP
Integrated Circuits (ICs)

SN65LVDS108DBTR

Active
Texas Instruments

1:8 LVDS CLOCK FANOUT BUFFER

Deep-Dive with AI

Technical Specifications

Parameters and characteristics for this part

SpecificationSN65LVDS108DBTR
Capacitance - Input5 pF
Current - Supply62 mA
Data Rate (Max)400 Mbps
Delay Time2.8 ns
InputLVDS
Mounting TypeSurface Mount
Number of Channels [custom]1
Number of Channels [custom]1:8
Operating Temperature [Max]85 °C
Operating Temperature [Min]-40 °C
OutputLVDS
Package / Case38-TFSOP
Package / Case [custom]4.4 mm
Package / Case [custom]0.173 in
Supplier Device Package38-TSSOP
TypeMultiplexer, Buffer
Voltage - Supply [Max]3.6 V
Voltage - Supply [Min]3 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyCut Tape (CT) 1$ 7.11
10$ 6.42
25$ 6.12
100$ 5.32
250$ 5.08
500$ 4.63
1000$ 4.03
Digi-Reel® 1$ 7.11
10$ 6.42
25$ 6.12
100$ 5.32
250$ 5.08
500$ 4.63
1000$ 4.03
Tape & Reel (TR) 2000$ 3.69
Texas InstrumentsLARGE T&R 1$ 5.17
100$ 4.21
250$ 3.31
1000$ 2.81

Description

General part information

SN65LVDS108 Series

The SN65LVDS108 is configured as one differential line receiver connected to eight differential line drivers. Individual output enables are provided for each output and an additional enable is provided for all outputs.

The line receivers and line drivers implement the electrical characteristics of low-voltage differential signaling (LVDS). LVDS, as specified in EIA/TIA-644, is a data signaling technique that offers low power, low noise emission, high noise immunity, and high switching speeds. (Note: The ultimate rate and distance of data transfer is dependent upon the attenuation characteristics of the media, the noise coupling to the environment, and other system characteristics.)

The intended application of this device, and the LVDS signaling technique, is for point-to-point or point-to-multipoint (distributed simplex) baseband data transmission on controlled impedance media of approximately 100. The transmission media may be printed-circuit board traces, backplanes, or cables. The large number of drivers integrated into the same silicon substrate, along with the low pulse skew of balanced signaling, provides extremely precise timing alignment of the signals being repeated from the inputs. This is particularly advantageous for implementing system clock or data distribution trees.

Documents

Technical documentation and resources