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Technical Specifications
Parameters and characteristics for this part
| Specification | TPIC6273N |
|---|---|
| Circuit [custom] | 8 |
| Circuit [custom] | 8 |
| Delay Time - Propagation | 625 ns |
| Independent Circuits | 1 |
| Logic Type | D-Type Transparent Latch |
| Mounting Type | Through Hole |
| Operating Temperature [Max] | 125 °C |
| Operating Temperature [Min] | -40 °C |
| Output Type | 1.81 mOhm |
| Package / Case | 20-DIP |
| Package / Case | 7.62 mm |
| Package / Case | 0.3 in |
| Supplier Device Package | 20-PDIP |
| Voltage - Supply [Max] | 5.5 V |
| Voltage - Supply [Min] | 4.5 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | Tube | 1 | $ 4.55 | |
| 20 | $ 4.09 | |||
| 40 | $ 3.87 | |||
| 100 | $ 3.35 | |||
| 260 | $ 3.18 | |||
| 500 | $ 2.85 | |||
| 1000 | $ 2.41 | |||
| 2500 | $ 2.28 | |||
| Texas Instruments | TUBE | 1 | $ 3.95 | |
| 100 | $ 3.46 | |||
| 250 | $ 2.43 | |||
| 1000 | $ 1.96 | |||
Description
General part information
TPIC6273 Series
The TPIC6273 is a monolithic high-voltage high-current power logic octal D-type latch with DMOS transistor outputs designed for use in systems that require relatively high load power. The device contains a built-in voltage clamp on the outputs for inductive transient protection. Power driver applications include relays, solenoids, and other medium-current or high-voltage loads.
The TPIC6273 contains eight positive-edge-triggered D-type flip-flops with a direct clear input. Each flip-flop features an open-drain power DMOS transistor output.
When clear (CLR\) is high, information at the D inputs meeting the setup time requirements is transferred to the DRAIN outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going pulse. When the clock input (CLK) is at either the high or low level, the D input signal has no effect at the output. An asynchronous CLR\ is provided to turn all eight DMOS-transistor outputs off.
Documents
Technical documentation and resources