
ADC1413D065HN-C18
ObsoleteDUAL 14 BITS ADC; 65 MSPS; SERIAL JESD204A
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ADC1413D065HN-C18
ObsoleteDUAL 14 BITS ADC; 65 MSPS; SERIAL JESD204A
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Technical Specifications
Parameters and characteristics for this part
| Specification | ADC1413D065HN-C18 |
|---|---|
| Architecture | Pipelined |
| Configuration | S/H-ADC |
| Data Interface | JESD204A |
| Features | Simultaneous Sampling |
| Input Type | Single Ended, Differential |
| Mounting Type | Surface Mount |
| Number of A/D Converters | 2 |
| Number of Bits | 14 |
| Number of Inputs | 2 |
| Operating Temperature [Max] | 85 °C |
| Operating Temperature [Min] | -40 °C |
| Package / Case | 56-VFQFN Exposed Pad |
| Ratio - S/H:ADC | 1:1 |
| Reference Type | External, Internal |
| Sampling Rate (Per Second) | 65 M |
| Supplier Device Package | 56-VFQFPN (8x8) |
| Voltage - Supply, Analog [Max] | 3.4 V |
| Voltage - Supply, Analog [Min] | 2.85 V |
| Voltage - Supply, Digital [Max] | 1.95 V |
| Voltage - Supply, Digital [Min] | 1.65 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
Description
General part information
ADC1413D065HN Series
The ADC1413D065HN is a dual channel 14-bit Analog-to-Digital Converter (ADC) optimized for high dynamic performances and low power at sample rates of 65 Msps. Pipelined architecture and output error correction ensure the ADC1413D065HN is accurate enough to guarantee zero missing codes over the entire operating range. Supplied from a 3.3 V source for analog and a 1.8 V source for the output driver, it has two serial outputs, because of the two lanes of differential outputs, which are compliant with the JESD204A standard. An integrated SPI (Serial Peripheral Interface) allows the user to easily configure the ADC. A set of IC configurations is also available via the binary level control pins taken, which are used at power-up.
Documents
Technical documentation and resources