Texas Instruments-M38510/50606BRA Simple Programmable Logic Devices - SPLDs SPLD PAL Family 25MHz 5V 20-Pin CDIP Tube

Integrated Circuits (ICs)

JM38510/65601BRA

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Texas Instruments

FLIP FLOP D-TYPE BUS INTERFACE POS-EDGE PUSH-PULL 1-ELEMENT 20-PIN CDIP TUBE

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Search across all available documentation for this part.

DocumentsDatasheet Logic Guide (Rev. AB)+13

Integrated Circuits (ICs)

JM38510/65601BRA

Active

Texas Instruments

FLIP FLOP D-TYPE BUS INTERFACE POS-EDGE PUSH-PULL 1-ELEMENT 20-PIN CDIP TUBE

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DocumentsDatasheet Logic Guide (Rev. AB)+13

Specifications Series Pricing Description Documents

Technical Specifications

Parameters and characteristics for this part

Specification	JM38510/65601BRA

Clock Frequency	60 MHz
Current - Output High, Low [custom]	5.2 mA
Current - Output High, Low [custom]	5.2 mA
Current - Quiescent (Iq)	8 ÁA
Input Capacitance	3 pF
Max Propagation Delay @ V, Max CL	27 ns
Mounting Type	Through Hole
Number of Bits per Element	8
Number of Elements	1
Operating Temperature [Max]	125 °C
Operating Temperature [Min]	-55 °C
Output Type	Non-Inverted
Package / Case	20-CDIP
Supplier Device Package	20-CDIP
Trigger Type	Positive Edge
Type	D-Type
Voltage - Supply [Max]	6 V
Voltage - Supply [Min]	2 V

SN54HC273 Series

Octal D-type Flip-Flops With Clear

Part	Package / Case	Supplier Device Package	Voltage - Supply [Min]	Voltage - Supply [Max]	Operating Temperature [Max]	Operating Temperature [Min]	Output Type	Trigger Type	Current - Quiescent (Iq)	Clock Frequency	Number of Elements	Current - Output High, Low [custom]	Current - Output High, Low [custom]	Input Capacitance	Max Propagation Delay @ V, Max CL	Number of Bits per Element	Type	Mounting Type
Texas Instruments SNJ54HC273W	20-CFlatPack	20-CFP	2 V	6 V	125 °C	-55 °C	Non-Inverted	Positive Edge	8 ÁA	60 MHz	1	5.2 mA	5.2 mA	3 pF	27 ns	8	D-Type	Surface Mount
Texas Instruments 84099012A
Texas Instruments 8409901SA	20-CFlatPack	20-CFP	2 V	6 V	125 °C	-55 °C	Non-Inverted	Positive Edge	8 ÁA	60 MHz	1	5.2 mA	5.2 mA	3 pF	27 ns	8	D-Type	Surface Mount
Texas Instruments 8409901RA	20-CDIP	20-CDIP	2 V	6 V	125 °C	-55 °C	Non-Inverted	Positive Edge	8 ÁA	60 MHz	1	5.2 mA	5.2 mA	3 pF	27 ns	8	D-Type	Through Hole
Texas Instruments SNJ54HC273J	20-CDIP	20-CDIP	2 V	6 V	125 °C	-55 °C	Non-Inverted	Positive Edge	8 ÁA	60 MHz	1	5.2 mA	5.2 mA	3 pF	27 ns	8	D-Type	Through Hole
Texas Instruments JM38510/65601BRA	20-CDIP	20-CDIP	2 V	6 V	125 °C	-55 °C	Non-Inverted	Positive Edge	8 ÁA	60 MHz	1	5.2 mA	5.2 mA	3 pF	27 ns	8	D-Type	Through Hole

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

Distributor	Package	Quantity	$

Arrow	N/A	1	$ 46.53
Texas Instruments	TUBE	1	$ 55.51
		100	$ 48.48
		250	$ 37.38
		1000	$ 33.44

Description

General part information

SN54HC273 Series

The SNx4HC273 devices are positive-edge-triggered D-type flip-flops with a direct active low clear (CLR) input.

Information at the data (D) inputs meeting the setup time requirements is transferred to the Q outputs on the positive-going edge of the clock (CLK) pulse. Clock triggering occurs at a particular voltage level and is not related directly to the transition time of the positive-going pulse. When CLK is at either the high or low level, the D input has no effect at the output.

The SNx4HC273 devices are positive-edge-triggered D-type flip-flops with a direct active low clear (CLR) input.

Documents

Technical documentation and resources

Datasheet

JM38510/65601BRA

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JM38510/65601BRA

Deep-Dive with AI

Technical Specifications

SN54HC273 Series

Pricing

Description

SN54HC273 Series

Documents

Datasheet

Logic Guide (Rev. AB)

Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)

Signal Switch Data Book (Rev. A)

SN54/74HCT CMOS Logic Family Applications and Restrictions

Live Insertion

Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc

CMOS Power Consumption and CPD Calculation (Rev. B)

Semiconductor Packing Material Electrostatic Discharge (ESD) Protection

Power-Up Behavior of Clocked Devices (Rev. B)

Implications of Slow or Floating CMOS Inputs (Rev. E)

Designing With Logic (Rev. C)

LOGIC Pocket Data Book (Rev. B)

Input and Output Characteristics of Digital Integrated Circuits

TI IBIS File Creation, Validation, and Distribution Processes

SN54HC273 Series