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Technical Specifications
Parameters and characteristics for this part
| Specification | TVP7001PZP |
|---|---|
| Applications | Consumer Video |
| Control Interface | I2C, Serial |
| Function | Digitizer |
| Mounting Type | Surface Mount |
| Package / Case | 100-TQFP Exposed Pad |
| Supplier Device Package | 100-HTQFP (14x14) |
| Voltage - Supply [Max] | 3.6 V, 2 V |
| Voltage - Supply [Min] | 1.8 V, 1.7 V, 3 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | Tray | 90 | $ 10.94 | |
| Texas Instruments | JEDEC TRAY (10+1) | 1 | $ 12.23 | |
| 100 | $ 10.68 | |||
| 250 | $ 8.24 | |||
| 1000 | $ 7.37 | |||
Description
General part information
TVP7001 Series
TVP7001 is a complete solution for digitizing video and graphic signals in RGB or YPbPr color spaces. The device supports pixel rates up to 165 MHz. Therefore, it can be used for PC graphics digitizing up to the VESA standard of UXGA (1600 × 1200) resolution at 60 Hz screen refresh rate, and in video environments for the digitizing of digital TV formats, including HDTV up to 1080p. TVP7001 can be used to digitize CVBS and S–video signal with 10–bit ADCs.
The TVP7001 is powered from 3.3–V and 1.8–V supply and integrates a triple high–performance A/D converter with clamping functions and variable gain, independently programmable for each channel. The clamping timing window is provided by an external pulse or can be generated internally. The TVP7001 includes analog slicing circuitry on the Y or G input to support sync–on–luminance or sync–on–green extraction. In addition, TVP7001 can extract discrete HSYNC and VSYNC from composite sync using a sync slicer.
TVP7001 also contains a complete analog PLL block to generate a pixel clock from the HSYNC input. Pixel clock output frequencies range from 12 MHz to 165 MHz.
Documents
Technical documentation and resources