DSLVDS1048PWT
Active3.3-V LVDS QUAD CHANNEL HIGH-SPEED DIFFERENTIAL LINE RECEIVER
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DSLVDS1048PWT
Active3.3-V LVDS QUAD CHANNEL HIGH-SPEED DIFFERENTIAL LINE RECEIVER
Technical Specifications
Parameters and characteristics for this part
| Specification | DSLVDS1048PWT |
|---|---|
| Data Rate | 400 Mbps |
| Mounting Type | Surface Mount |
| Number of Drivers/Receivers [custom] | 0 |
| Number of Drivers/Receivers [custom] | 4 |
| Operating Temperature [Max] | 85 °C |
| Operating Temperature [Min] | -40 °C |
| Package / Case | 16-TSSOP |
| Package / Case [x] | 0.173 in |
| Package / Case [y] | 4.4 mm |
| Protocol | LVDS |
| Supplier Device Package | 16-TSSOP |
| Type | Receiver |
| Voltage - Supply [Max] | 3.6 V |
| Voltage - Supply [Min] | 3 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | Cut Tape (CT) | 1 | $ 2.27 | |
| 10 | $ 2.04 | |||
| 25 | $ 1.92 | |||
| 100 | $ 1.64 | |||
| 250 | $ 1.54 | |||
| 500 | $ 1.35 | |||
| Digi-Reel® | 1 | $ 2.27 | ||
| 10 | $ 2.04 | |||
| 25 | $ 1.92 | |||
| 100 | $ 1.64 | |||
| 250 | $ 1.54 | |||
| 500 | $ 1.35 | |||
| Tape & Reel (TR) | 1000 | $ 0.95 | ||
| Texas Instruments | SMALL T&R | 1 | $ 1.71 | |
| 100 | $ 1.41 | |||
| 250 | $ 1.01 | |||
| 1000 | $ 0.76 | |||
Description
General part information
DSLVDS1048 Series
The DSLVDS1048 device is a quad CMOS flow-through differential line receiver designed for applications requiring ultra-low power dissipation and high data rates. The device is designed to support data rates in excess of 400 Mbps (200 MHz) using Low Voltage Differential Signaling (LVDS) technology.
The DSLVDS1048 accepts low voltage (350 mV typical) differential input signals and translates them to 3-V CMOS output levels. The receiver supports a TRI-STATE function that may be used to multiplex outputs. The receiver also supports open, shorted, and terminated (100-Ω) input fail-safe. The receiver output is HIGH for all fail-safe conditions. The DSLVDS1048 has a flow-through pinout for easy PCB layout.
The EN and EN* inputs are ANDed together and control the TRI-STATE outputs. The enables are common to all four receivers. The DSLVDS1048 and companion LVDS line driver (for example, DSLVDS1047) provide a new alternative to high-power PECL/ECL devices for high-speed point-to-point interface applications.
Documents
Technical documentation and resources