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48-SSOP
Integrated Circuits (ICs)

SN74LVCH16374ADL

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Texas Instruments

16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS

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48-SSOP
Integrated Circuits (ICs)

SN74LVCH16374ADL

Active
Texas Instruments

16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS

Technical Specifications

Parameters and characteristics for this part

SpecificationSN74LVCH16374ADL
Clock Frequency150 MHz
Current - Output High, Low24 mA
Current - Quiescent (Iq)20 çA
FunctionStandard
Input Capacitance5 pF
Max Propagation Delay @ V, Max CL4.5 ns
Mounting TypeSurface Mount
Number of Bits per Element8
Number of Elements2
Operating Temperature [Max]125 °C
Operating Temperature [Min]-40 °C
Output TypeTri-State, Non-Inverted
Package / Case48-BSSOP
Package / Case [y]0.295 in
Package / Case [y]7.5 mm
Supplier Device Package48-SSOP
Trigger TypePositive Edge
TypeD-Type
Voltage - Supply [Max]3.6 V
Voltage - Supply [Min]1.65 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyTube 1$ 1.07
10$ 0.95
25$ 0.91
100$ 0.74
250$ 0.70
500$ 0.62
1000$ 0.57
Texas InstrumentsTUBE 1$ 1.13
100$ 0.87
250$ 0.64
1000$ 0.46

Description

General part information

SN74LVCH16374A Series

This 16-bit edge-triggered D-type flip-flop is designed for 1.65-V to 3.6-V VCCoperation.

This 16-bit edge-triggered D-type flip-flop is designed for 1.65-V to 3.6-V VCCoperation.

Documents

Technical documentation and resources

Datasheet

Datasheet

TI IBIS File Creation, Validation, and Distribution Processes

Application note

Power-Up Behavior of Clocked Devices (Rev. B)

Application note

Signal Switch Data Book (Rev. A)

User guide

Little Logic Guide 2018 (Rev. G)

Selection guide

LOGIC Pocket Data Book (Rev. B)

User guide

Power-Up 3-State (PU3S) Circuits in TI Standard Logic Devices

Application note

Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A)

Application note

Texas Instruments Little Logic Application Report

Application note

CMOS Power Consumption and CPD Calculation (Rev. B)

Application note

Selecting the Right Level Translation Solution (Rev. A)

Application note

STANDARD LINEAR AND LOGIC FOR DVD/VCD PLAYERS

More literature

Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)

Application note

Live Insertion

Application note

Use of the CMOS Unbuffered Inverter in Oscillator Circuits

Application note

Logic Guide (Rev. AB)

Selection guide

An Overview of Bus-Hold Circuit and the Applications (Rev. B)

Application note

Low-Voltage Logic (LVC) Designer's Guide

Design guide

Semiconductor Packing Material Electrostatic Discharge (ESD) Protection

Application note

16-Bit Widebus Logic Families in 56-Ball, 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B)

Application note

How to Select Little Logic (Rev. A)

Application note

LVC and LV Low-Voltage CMOS Logic Data Book (Rev. B)

User guide

Migration From 3.3-V To 2.5-V Power Supplies For Logic Devices

Application note

Implications of Slow or Floating CMOS Inputs (Rev. E)

Application note

Input and Output Characteristics of Digital Integrated Circuits

Application note

Design Summary for WCSP Little Logic (Rev. B)

Product overview

LVC Characterization Information

Application note

Understanding Advanced Bus-Interface Products Design Guide

Application note

Standard Linear & Logic for PCs, Servers & Motherboards

More literature