
SN74ABT18502PM
ActiveSCAN TEST DEVICES WITH 18-BIT UNIVERSAL BUS TRANSCEIVER
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SN74ABT18502PM
ActiveSCAN TEST DEVICES WITH 18-BIT UNIVERSAL BUS TRANSCEIVER
Technical Specifications
Parameters and characteristics for this part
| Specification | SN74ABT18502PM |
|---|---|
| Logic Type | Scan Test Device with Registered Bus Transceiver |
| Mounting Type | Surface Mount |
| Operating Temperature [Max] | 85 °C |
| Operating Temperature [Min] | -40 °C |
| Package / Case | 64-LQFP |
| Supplier Device Package | 64-LQFP (10x10) |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | Tray | 160 | $ 19.98 | |
| Texas Instruments | JEDEC TRAY (10+1) | 1 | $ 24.35 | |
| 100 | $ 21.27 | |||
| 250 | $ 16.40 | |||
| 1000 | $ 14.67 | |||
Description
General part information
SN74ABT18502 Series
The SN74ABT18502 scan test device with an 18-bit universal bus transceiver is a member of the Texas Instruments SCOPE™ testability IC family. This family of devices supports IEEE Std 1149.1-1990 boundary scan to facilitate testing of complex circuit board assemblies. Scan access to the test circuitry is accomplished via the four-wire test access port (TAP) interface.
In the normal mode, this device is an 18-bit universal bus transceiver that combines D-type latches and D-type flip-flops to allow data flow in transparent, latched, or clocked modes. The device can be used either as two 9-bit transceivers or one 18-bit transceiver. The test circuitry can be activated by the TAP to take snapshot samples of the data appearing at the device pins or to perform a self test on the boundary test cells. Activating the TAP in the normal mode does not affect the functional operation of the SCOPE universal bus transceivers.
Data flow in each direction is controlled by output-enable (OEAB\ and OEBA\), latch-enable (LEAB and LEBA), and clock (CLKAB and CLKBA) inputs. For A-to-B data flow, the device operates in the transparent mode when LEAB is high. When LEAB is low, the A-bus data is latched while CLKAB is held at a static low or high logic level. Otherwise, if LEAB is low, A-bus data is stored on a low-to-high transition of CLKAB. When OEAB\ is low, the B outputs are active. When OEAB\ is high, the B outputs are in the high-impedance state. B-to-A data flow is similar to A-to-B data flow but uses the OEBA\, LEBA, and CLKBA inputs.
Documents
Technical documentation and resources