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Texas Instruments-SN74HC4040DE4 Counter Shift Registers Counter Single 12-Bit Binary UP 16-Pin SOIC Tube
Integrated Circuits (ICs)

SN74F109D

Obsolete
Texas Instruments

FLIP FLOP JK# -TYPE POS-EDGE 2-ELEMENT 16-PIN SOIC TUBE

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Texas Instruments-SN74HC4040DE4 Counter Shift Registers Counter Single 12-Bit Binary UP 16-Pin SOIC Tube
Integrated Circuits (ICs)

SN74F109D

Obsolete
Texas Instruments

FLIP FLOP JK# -TYPE POS-EDGE 2-ELEMENT 16-PIN SOIC TUBE

Deep-Dive with AI

Technical Specifications

Parameters and characteristics for this part

SpecificationSN74F109D
Clock Frequency150 MHz
Current - Output High, Low [custom]1 mA
Current - Output High, Low [custom]20 mA
FunctionReset, Set(Preset)
Mounting TypeSurface Mount
Number of Bits per Element1
Number of Elements2
Operating Temperature [Max]70 °C
Operating Temperature [Min]0 °C
Output TypeComplementary
Package / Case16-SOIC
Package / Case [x]0.154 in
Package / Case [y]3.9 mm
Supplier Device Package16-SOIC
Trigger TypePositive Edge
TypeJK Type
Voltage - Supply [Max]5.5 V
Voltage - Supply [Min]4.5 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyTube 1$ 1.65
10$ 1.04
25$ 0.88
100$ 0.70
250$ 0.61
500$ 0.56

Description

General part information

SN74F109 Series

These devices contain two independent J-K\ positive-edge-triggered flip-flops. A low level at the preset (PRE\) or clear (CLR\) inputs sets or resets the outputs regardless of the levels of the other inputs. When PRE\ and CLR\ are inactive (high), data at the J and K\ input meeting the setup-time requirements are transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold time interval, data at the J and K\ inputs may be changed without affecting the levels at the outputs. These versatile flip-flops can perform as toggle flip-flops by grounding K\ and trying J high. They also can perform as D-type flip-flops if J and K\ are tied together.

The SN54F109 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74F109 is characterized for operation from 0°C to 70°C.

These devices contain two independent J-K\ positive-edge-triggered flip-flops. A low level at the preset (PRE\) or clear (CLR\) inputs sets or resets the outputs regardless of the levels of the other inputs. When PRE\ and CLR\ are inactive (high), data at the J and K\ input meeting the setup-time requirements are transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold time interval, data at the J and K\ inputs may be changed without affecting the levels at the outputs. These versatile flip-flops can perform as toggle flip-flops by grounding K\ and trying J high. They also can perform as D-type flip-flops if J and K\ are tied together.

Documents

Technical documentation and resources

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