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28-pin (RHR) package image
Integrated Circuits (ICs)

SN75DPHY440SSRHRR

Active
Texas Instruments

MIPI® CSI-2/DSI DPHY RETIMER 0 TO 70C OPERATING TEMPERATURE

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Search across all available documentation for this part.

DocumentsSNx5DPHY440SS MIPI® CSI-2/DSI DPHY Retimer datasheet (Rev. D)
28-pin (RHR) package image
Integrated Circuits (ICs)

SN75DPHY440SSRHRR

Active
Texas Instruments

MIPI® CSI-2/DSI DPHY RETIMER 0 TO 70C OPERATING TEMPERATURE

Deep-Dive with AI

DocumentsSNx5DPHY440SS MIPI® CSI-2/DSI DPHY Retimer datasheet (Rev. D)

Technical Specifications

Parameters and characteristics for this part

SpecificationSN75DPHY440SSRHRR
ApplicationsVideo Display
Control InterfaceI2C
Mounting TypeSurface Mount
Package / Case28-WFQFN Exposed Pad
Supplier Device Package28-WQFN (5.5x3.5)
Voltage - Supply [Max]1.98 V
Voltage - Supply [Min]1.62 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyCut Tape (CT) 1$ 3.53
10$ 3.17
25$ 3.00
100$ 2.60
250$ 2.47
500$ 2.21
1000$ 1.87
Digi-Reel® 1$ 3.53
10$ 3.17
25$ 3.00
100$ 2.60
250$ 2.47
500$ 2.21
1000$ 1.87
Tape & Reel (TR) 3000$ 1.77
Texas InstrumentsLARGE T&R 1$ 2.67
100$ 2.34
250$ 1.64
1000$ 1.32

Description

General part information

SN75DPHY440SS Series

The DPHY440 is a 1-lane to 4-lane and clock MIPI DPHY retimer that regenerates the DPHY signaling. The device complies with MIPI DPHY 1.1 standard and can be used in either a MIPI CSI-2 or MIPI DSI application at datarates of up to 1.5Gbps.

The device compensates for PCB, connector, and cable related frequency loss and switching related loss to provide the optimum electrical performance from a CSI-2/DSI source to sink. The DPHY440 DPHY inputs feature configurable equalizers.

The output pins automatically compensate for uneven skew between clock and data lanes received on the inputs ports of the device. The DPHY440 output voltage swing and edge rate can be adjusted by changing the state of the VSADJ_CFG0 pin and ERC pin, respectively.