Specification	MC14516BDG

Count Rate	8 MHz
Direction	Up, Down
Logic Type	Binary Counter
Mounting Type	Surface Mount
Number of Bits per Element	4
Number of Elements	1
Operating Temperature [Max]	125 °C
Operating Temperature [Min]	-55 °C
Package / Case	16-SOIC
Package / Case [x]	0.154 in
Package / Case [y]	3.9 mm
Reset	Asynchronous
Supplier Device Package	16-SOIC
Timing	Synchronous
Trigger Type	Positive Edge
Voltage - Supply [Max]	18 V
Voltage - Supply [Min]	3 V

MC14516B Series

Binary Up/Down Counter

Part	Trigger Type	Timing	Mounting Type	Supplier Device Package	Package / Case	Package / Case [x]	Package / Case [y]	Logic Type	Direction	Number of Elements	Number of Bits per Element	Operating Temperature [Min]	Operating Temperature [Max]	Reset	Count Rate	Voltage - Supply [Max]	Voltage - Supply [Min]
ON Semiconductor MC14516BFELG
ON Semiconductor MC14516BDG	Positive Edge	Synchronous	Surface Mount	16-SOIC	16-SOIC	0.154 in	3.9 mm	Binary Counter	Down Up	1	4	-55 °C	125 °C	Asynchronous	8 MHz	18 V	3 V
ON Semiconductor MC14516BDR2G	Positive Edge	Synchronous	Surface Mount	16-SOIC	16-SOIC	0.154 in	3.9 mm	Binary Counter	Down Up	1	4	-55 °C	125 °C	Asynchronous	8 MHz	18 V	3 V
ON Semiconductor MC14516BD	Positive Edge	Synchronous	Surface Mount	16-SOIC	16-SOIC	0.154 in	3.9 mm	Binary Counter	Down Up	1	4	-55 °C	125 °C	Asynchronous	8 MHz	18 V	3 V
ON Semiconductor MC14516BDR2	Positive Edge	Synchronous	Surface Mount	16-SOIC	16-SOIC	0.154 in	3.9 mm	Binary Counter	Down Up	1	4	-55 °C	125 °C	Asynchronous	8 MHz	18 V	3 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

Distributor	Package	Quantity	$

Digikey	Tube	1	$ 1.35
		10	$ 0.81
		25	$ 0.68
		100	$ 0.53
		250	$ 0.46
		500	$ 0.42
		1000	$ 0.38
		2500	$ 0.35
		5000	$ 0.33
ON Semiconductor	N/A	1	$ 0.25

Description

General part information

MC14516B Series

The MC14516B synchronous up/down binary counter is constructed with MOS P-channel and N-channel enhancement mode devices in a monolithic structure.This counter can be preset by applying the desired value, in binary, to the Preset inputs (P0, P1, P2, P3) and then bringing the Preset Enable (PE) high. The direction of counting is controlled by applying a high (for up counting) or a low (for down counting) to the UP/DOWN input. The state of the counter changes on the positive transition of the clock input.Cascading can be accomplished by connecting the Carrybar Outbar to the Carrybar Inbar of the next stage while clocking each counter in parallel. The outputs (Q0, Q1, Q2, Q3) can be reset to a low state by applying a high to the reset (R) pin.This CMOS counter finds primary use in up/down and difference counting. Other applications include: (1) Frequency synthesizer applications where low power dissipation and/or high noise immunity is desired, (2) Analog-to-digital and digital-to-analog conversions, and (3) Magnitude and sign generation.