8400110EKILFT
ObsoleteLOW JITTER, TELECOM RATE-CONVERSION PLL
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8400110EKILFT
ObsoleteLOW JITTER, TELECOM RATE-CONVERSION PLL
Deep-Dive with AI
Technical Specifications
Parameters and characteristics for this part
| Specification | 8400110EKILFT |
|---|---|
| Differential - Input:Output | False |
| Divider/Multiplier | False |
| Frequency - Max [Max] | 65.536 MHz |
| Input | Crystal |
| Mounting Type | Surface Mount |
| Number of Circuits | 1 |
| Operating Temperature [Max] | 85 °C |
| Operating Temperature [Min] | -40 °C |
| Output | LVCMOS, LVTTL |
| Package / Case | 32-VFQFN Exposed Pad |
| PLL | True |
| Ratio - Input:Output | 2:1 |
| Supplier Device Package | 32-VFQFPN (5x5) |
| Type | Clock Generator |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
Description
General part information
8400110I Series
The 8400110I is a Low Jitter Telecom Rate- Conversion PLL that provides accurate and reliable frequency conversion. The 8400110I generates a 65.536MHz clock that is either locked to the input reference or locked to the external crystal or oscillator. In the locked mode, the reference input is continuously monitored for a failure condition. In the event of a failure, the PLL continues to provide a stable free-running clock, ensuring system reliability.
Documents
Technical documentation and resources