LMK5B33216RGCT
Active16-OUTPUT, THREE DPLL AND APLL, NETWORK SYNCHRONIZER WITH INTEGRATED 2.5-GHZ BULK-ACOUSTIC-WAVE VCO
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LMK5B33216RGCT
Active16-OUTPUT, THREE DPLL AND APLL, NETWORK SYNCHRONIZER WITH INTEGRATED 2.5-GHZ BULK-ACOUSTIC-WAVE VCO
Technical Specifications
Parameters and characteristics for this part
| Specification | LMK5B33216RGCT |
|---|---|
| Differential - Input:Output [custom] | True |
| Differential - Input:Output [custom] | True |
| Divider/Multiplier | Yes/No |
| Frequency - Max [Max] | 1.25 GHz |
| Input | HCSL, LVDS, LVCMOS, LVPECL |
| Mounting Type | Surface Mount |
| Number of Circuits | 1 |
| Operating Temperature [Max] | 85 °C |
| Operating Temperature [Min] | -40 °C |
| Output | LVCMOS, CML, LVDS, LVPECL |
| Package / Case | 64-VFQFN Exposed Pad |
| PLL | True |
| Ratio - Input:Output [custom] | 16 |
| Ratio - Input:Output [custom] | 2 |
| Supplier Device Package | 64-VQFN (9x9) |
| Voltage - Supply [Max] | 3.465 V |
| Voltage - Supply [Min] | 3.135 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | Tape & Reel (TR) | 250 | $ 43.63 | |
| Texas Instruments | SMALL T&R | 1 | $ 48.96 | |
| 100 | $ 43.52 | |||
| 250 | $ 35.78 | |||
| 1000 | $ 32.00 | |||
Description
General part information
LMK5B33216 Series
The LMK5B33216 is a high-performance network synchronizer and jitter cleaner designed to meet the stringent requirements of ethernet-based networking applications with < 5ns timing accuracy (ITU-T G.8273.2 Class D).
The device integrates three DPLLs and three APLLs to provide hitless switching and jitter attenuation with programmable loop bandwidth (LBW) and one external loop filter capacitor, maximizing flexibility and ease of use.
APLL3 features an ultra-high performance PLL with TI’s proprietary Bulk Acoustic Wave (BAW) technology in the VCO and can generate 312.5MHz output clocks with 42fs typical RMS jitter (12kHz to 20MHz) irrespective of the DPLL reference input frequency and jitter characteristics. APLL2 and APLL1 feature conventional LC VCOs to provide options for a second or third frequency and/or synchronization domain.
Documents
Technical documentation and resources