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527-01 - Block Diagram
Integrated Circuits (ICs)

527R-01ILFT

Obsolete
Renesas Electronics Corporation

CLOCK SLICER USER CONFIGURABLE ZERO DELAY BUFFER

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527-01 - Block Diagram
Integrated Circuits (ICs)

527R-01ILFT

Obsolete
Renesas Electronics Corporation

CLOCK SLICER USER CONFIGURABLE ZERO DELAY BUFFER

Deep-Dive with AI

Technical Specifications

Parameters and characteristics for this part

Specification527R-01ILFT
Differential - Input:Output [custom]False
Differential - Input:Output [custom]False
Frequency - Max [Max]140 MHz
InputClock
Mounting TypeSurface Mount
Number of Circuits1
Operating Temperature [Max]85 °C
Operating Temperature [Min]-40 C
OutputClock
Package / Case28-SSOP
Package / Case [x]0.154 in
Package / Case [y]3.9 mm
PLLTrue
Ratio - Input:Output1:2
Supplier Device Package28-QSOP
TypeZero Delay Buffer, Fanout Buffer (Distribution)
Voltage - Supply [Max]3.6 V
Voltage - Supply [Min]3 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyN/A 0$ 0.00

Description

General part information

527-01 Series

The 527-01 Clock Slicer is the most flexible way to generate an output clock from an input clock with zero skew. The user can easily configure the device to produce nearly any output clock that is multiplied or divided from the input clock. The part supports non-integer multiplications and divisions. A SYNC pulse indicates when the rising clock edges are aligned with zero skew. Using Phase-Locked Loop (PLL) techniques, the device accepts an input clock up to 200 MHz and produces an output clock up to 160 MHz. The 527-01 aligns rising edges on ICLK and FBIN at a ratio determined by the reference and feedback dividers. For configurable clocks that do not require zero delay, use the 525.

Documents

Technical documentation and resources