Specification	SN74LVC02AWBQARQ1

Current - Output High, Low	24 mA
Current - Quiescent (Max) [Max]	10 µA
Grade	Automotive
Input Logic Level - Low	0.8 V
Logic Type	NOR Gate
Max Propagation Delay @ V, Max CL	5.5 ns
Mounting Type	Wettable Flank, Surface Mount
Number of Circuits	4
Number of Inputs	2
Operating Temperature [Max]	125 °C
Operating Temperature [Min]	-40 °C
Package / Case	14-WFDFN Exposed Pad
Qualification	AEC-Q100
Supplier Device Package	14-WQFN (3x2.5)
Voltage - Supply [Max]	3.6 V
Voltage - Supply [Min]	2 V

SN74LVC02A-Q1 Series

Automotive 4-ch, 2-input, 2-V to 3.6-V NOR gates

Part	Logic Type	Current - Quiescent (Max) [Max]	Mounting Type	Voltage - Supply [Min]	Voltage - Supply [Max]	Number of Inputs	Current - Output High, Low	Supplier Device Package	Input Logic Level - High [Min]	Input Logic Level - High [Max]	Package / Case	Operating Temperature [Max]	Operating Temperature [Min]	Max Propagation Delay @ V, Max CL	Input Logic Level - Low [Max]	Input Logic Level - Low [Min]	Number of Circuits	Package / Case [x]	Package / Case [y]	Package / Case [custom]	Package / Case [custom]	Qualification	Grade	Input Logic Level - Low
Texas Instruments SN74LVC02ARGYR	NOR Gate	1 çA	Surface Mount	1.65 V	3.6 V	2	24 mA	14-VQFN (3.5x3.5)	1.7 V	2 V	14-VFQFN Exposed Pad	85 °C	-40 °C	4.2 ns	0.8 V	0.7 V	4
Texas Instruments SN74LVC02ADR	NOR Gate	1 çA	Surface Mount	1.65 V	3.6 V	2	24 mA		1.7 V	2 V	14-SOIC	125 °C	-40 °C	4.2 ns	0.8 V	0.7 V	4	0.154 in	3.9 mm
Texas Instruments SN74LVC02APWR	NOR Gate	1 çA	Surface Mount	1.65 V	3.6 V	2	24 mA	14-TSSOP	1.7 V	2 V	14-TSSOP	125 °C	-40 °C	4.2 ns	0.8 V	0.7 V	4			0.173 "	4.4 mm
Texas Instruments SN74LVC02APWRG4	NOR Gate	1 çA	Surface Mount	1.65 V	3.6 V	2	24 mA	14-TSSOP	1.7 V	2 V	14-TSSOP	125 °C	-40 °C	4.2 ns	0.8 V	0.7 V	4			0.173 "	4.4 mm
Texas Instruments SN74LVC02AWBQARQ1	NOR Gate	10 µA	Surface Mount Wettable Flank	2 V	3.6 V	2	24 mA	14-WQFN (3x2.5)			14-WFDFN Exposed Pad	125 °C	-40 °C	5.5 ns			4					AEC-Q100	Automotive	0.8 V
Texas Instruments SN74LVC02ANSR	NOR Gate	1 çA	Surface Mount	1.65 V	3.6 V	2	24 mA	14-SO	1.7 V	2 V	14-SOIC	125 °C	-40 °C	4.2 ns	0.8 V	0.7 V	4	0.209 "	5.3 mm
Texas Instruments SN74LVC02AD	NOR Gate	1 çA	Surface Mount	1.65 V	3.6 V	2	24 mA		1.7 V	2 V	14-SOIC	125 °C	-40 °C	4.2 ns	0.8 V	0.7 V	4	0.154 in	3.9 mm
Texas Instruments SN74LVC02DR
Texas Instruments SN74LVC02APWTG4	NOR Gate	1 çA	Surface Mount	1.65 V	3.6 V	2	24 mA	14-TSSOP	1.7 V	2 V	14-TSSOP	125 °C	-40 °C	4.2 ns	0.8 V	0.7 V	4			0.173 "	4.4 mm
Texas Instruments SN74LVC02APWT	NOR Gate	1 çA	Surface Mount	1.65 V	3.6 V	2	24 mA	14-TSSOP	1.7 V	2 V	14-TSSOP	125 °C	-40 °C	4.2 ns	0.8 V	0.7 V	4			0.173 "	4.4 mm

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

Distributor	Package	Quantity	$

Digikey	Cut Tape (CT)	1	$ 0.86
		10	$ 0.53
		25	$ 0.45
		100	$ 0.35
		250	$ 0.30
		500	$ 0.27
		1000	$ 0.24
	Digi-Reel®	1	$ 0.86
		10	$ 0.53
		25	$ 0.45
		100	$ 0.35
		250	$ 0.30
		500	$ 0.27
		1000	$ 0.24
	Tape & Reel (TR)	3000	$ 0.19
		6000	$ 0.18
		15000	$ 0.17
		30000	$ 0.16
Texas Instruments	LARGE T&R	1	$ 0.36
		100	$ 0.24
		250	$ 0.19
		1000	$ 0.12

Description

General part information

SN74LVC02A-Q1 Series

Inputs can be driven from either 3.3V or 5V devices. This feature allows the use of these devices as translators in a mixed 3.3V/5V system environment.

The device performs the Boolean function Y = A + B or Y = A ⋅ B in positive logic.

Inputs can be driven from either 3.3V or 5V devices. This feature allows the use of this device as a translator in a mixed 3.3V/5V system environment.

Documents

Technical documentation and resources

SN74LVC02AWBQARQ1

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Technical Specifications

SN74LVC02A-Q1 Series

Pricing

Description

SN74LVC02A-Q1 Series

Documents

STANDARD LINEAR AND LOGIC FOR DVD/VCD PLAYERS

Live Insertion

LVC and LV Low-Voltage CMOS Logic Data Book (Rev. B)

Understanding Advanced Bus-Interface Products Design Guide

SN74LVC02A-Q1 Automotive Quadruple 2-Input Positive-NOR Gate datasheet (Rev. F)

How to Select Little Logic (Rev. A)

Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)

Power-Up 3-State (PU3S) Circuits in TI Standard Logic Devices

Standard Linear & Logic for PCs, Servers & Motherboards

16-Bit Widebus Logic Families in 56-Ball, 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B)

Selecting the Right Level Translation Solution (Rev. A)

Texas Instruments Little Logic Application Report

Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A)

Input and Output Characteristics of Digital Integrated Circuits

Migration From 3.3-V To 2.5-V Power Supplies For Logic Devices

LOGIC Pocket Data Book (Rev. B)

Signal Switch Data Book (Rev. A)

CMOS Power Consumption and CPD Calculation (Rev. B)

LVC Characterization Information

Low-Voltage Logic (LVC) Designer's Guide

TI IBIS File Creation, Validation, and Distribution Processes

Implications of Slow or Floating CMOS Inputs (Rev. E)

Use of the CMOS Unbuffered Inverter in Oscillator Circuits

Logic Guide (Rev. AB)

Semiconductor Packing Material Electrostatic Discharge (ESD) Protection

Little Logic Guide 2018 (Rev. G)

Design Summary for WCSP Little Logic (Rev. B)

SN74LVC02A-Q1 Series