
CDC351DBR
Active1-LINE TO 10-LINE 3.3-V CLOCK DRIVER WITH TRI-STATE OUTPUTS
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CDC351DBR
Active1-LINE TO 10-LINE 3.3-V CLOCK DRIVER WITH TRI-STATE OUTPUTS
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Technical Specifications
Parameters and characteristics for this part
| Specification | CDC351DBR |
|---|---|
| Differential - Input:Output | False |
| Frequency - Max [Max] | 100 MHz |
| Mounting Type | Surface Mount |
| Number of Circuits | 1 |
| Operating Temperature [Max] | 70 °C |
| Operating Temperature [Min] | 0 °C |
| Output | LVTTL, TRI-State |
| Package / Case | 24-SSOP |
| Ratio - Input:Output [custom] | 1:10 |
| Supplier Device Package | 24-SSOP |
| Type | Fanout Buffer (Distribution) |
| Voltage - Supply [Max] | 3.6 V |
| Voltage - Supply [Min] | 3 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | Cut Tape (CT) | 1 | $ 12.08 | |
| 10 | $ 11.11 | |||
| 25 | $ 10.64 | |||
| 100 | $ 9.38 | |||
| 250 | $ 8.92 | |||
| 500 | $ 8.34 | |||
| 1000 | $ 7.65 | |||
| Digi-Reel® | 1 | $ 12.08 | ||
| 10 | $ 11.11 | |||
| 25 | $ 10.64 | |||
| 100 | $ 9.38 | |||
| 250 | $ 8.92 | |||
| 500 | $ 8.34 | |||
| 1000 | $ 7.65 | |||
| Tape & Reel (TR) | 2000 | $ 7.37 | ||
| Texas Instruments | LARGE T&R | 1 | $ 9.46 | |
| 100 | $ 8.26 | |||
| 250 | $ 6.37 | |||
| 1000 | $ 5.70 | |||
Description
General part information
CDC351 Series
The CDC351 is a high-performance clock-driver circuit that distributes one input (A) to ten outputs (Y) with minimum skew for clock distribution. The output-enable (OE)\ input disables the outputs to a high-impedance state. The CDC351 operates at nominal 3.3-V VCC.
The propagation delays are adjusted at the factory using the P0 and P1 pins. The factory adjustments ensure that the part-to-part skew is minimized and is kept within a specified window. Pins P0 and P1 are not intended for customer use and should be connected to GND.
The CDC351 is a high-performance clock-driver circuit that distributes one input (A) to ten outputs (Y) with minimum skew for clock distribution. The output-enable (OE)\ input disables the outputs to a high-impedance state. The CDC351 operates at nominal 3.3-V VCC.
Documents
Technical documentation and resources