
CD74HCT174M96
ActiveFLIP FLOP D-TYPE BUS INTERFACE POS-EDGE PUSH-PULL 1-ELEMENT 16-PIN SOIC T/R
Deep-Dive with AI
Search across all available documentation for this part.

CD74HCT174M96
ActiveFLIP FLOP D-TYPE BUS INTERFACE POS-EDGE PUSH-PULL 1-ELEMENT 16-PIN SOIC T/R
Deep-Dive with AI
Technical Specifications
Parameters and characteristics for this part
| Specification | CD74HCT174M96 |
|---|---|
| Clock Frequency | 25 MHz |
| Current - Output High, Low [custom] | 4 mA |
| Current - Output High, Low [custom] | 4 mA |
| Current - Quiescent (Iq) | 8 ÁA |
| Input Capacitance | 10 pF |
| Max Propagation Delay @ V, Max CL | 40 ns |
| Mounting Type | Surface Mount |
| Number of Bits per Element | 6 |
| Number of Elements | 1 |
| Operating Temperature [Max] | 125 °C |
| Operating Temperature [Min] | -55 °C |
| Output Type | Non-Inverted |
| Package / Case | 16-SOIC |
| Package / Case [x] | 0.154 in |
| Package / Case [y] | 3.9 mm |
| Supplier Device Package | 16-SOIC |
| Trigger Type | Positive Edge |
| Type | D-Type |
| Voltage - Supply [Max] | 5.5 V |
| Voltage - Supply [Min] | 4.5 V |
CD74HCT174 Series
High Speed CMOS Logic Hex D-Type Flip-Flop with Reset
| Part | Mounting Type | Type | Number of Elements | Max Propagation Delay @ V, Max CL | Number of Bits per Element | Trigger Type | Supplier Device Package | Current - Output High, Low [custom] | Current - Output High, Low [custom] | Clock Frequency | Current - Quiescent (Iq) | Package / Case | Package / Case [x] | Package / Case [y] | Output Type | Operating Temperature [Max] | Operating Temperature [Min] | Input Capacitance | Voltage - Supply [Min] | Voltage - Supply [Max] | Package / Case | Package / Case |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Texas Instruments | Surface Mount | D-Type | 1 | 40 ns | 6 | Positive Edge | 16-SOIC | 4 mA | 4 mA | 25 MHz | 8 ÁA | 16-SOIC | 0.154 in | 3.9 mm | Non-Inverted | 125 °C | -55 °C | 10 pF | 4.5 V | 5.5 V | ||
Texas Instruments | Surface Mount | D-Type | 1 | 40 ns | 6 | Positive Edge | 16-SOIC | 4 mA | 4 mA | 25 MHz | 8 ÁA | 16-SOIC | 0.154 in | 3.9 mm | Non-Inverted | 125 °C | -55 °C | 10 pF | 4.5 V | 5.5 V | ||
Texas Instruments | Surface Mount | D-Type | 1 | 40 ns | 6 | Positive Edge | 16-SOIC | 4 mA | 4 mA | 25 MHz | 8 ÁA | 16-SOIC | 0.154 in | 3.9 mm | Non-Inverted | 125 °C | -55 °C | 10 pF | 4.5 V | 5.5 V | ||
Texas Instruments | Through Hole | D-Type | 1 | 40 ns | 6 | Positive Edge | 16-PDIP | 4 mA | 4 mA | 25 MHz | 8 ÁA | 16-DIP | Non-Inverted | 125 °C | -55 °C | 10 pF | 4.5 V | 5.5 V | 0.3 in | 7.62 mm |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | Cut Tape (CT) | 1 | $ 0.60 | |
| 10 | $ 0.52 | |||
| 25 | $ 0.48 | |||
| 100 | $ 0.38 | |||
| 250 | $ 0.36 | |||
| 500 | $ 0.30 | |||
| 1000 | $ 0.23 | |||
| Digi-Reel® | 1 | $ 0.60 | ||
| 10 | $ 0.52 | |||
| 25 | $ 0.48 | |||
| 100 | $ 0.38 | |||
| 250 | $ 0.36 | |||
| 500 | $ 0.30 | |||
| 1000 | $ 0.23 | |||
| Tape & Reel (TR) | 2500 | $ 0.14 | ||
| Texas Instruments | LARGE T&R | 1 | $ 0.37 | |
| 100 | $ 0.25 | |||
| 250 | $ 0.19 | |||
| 1000 | $ 0.13 | |||
Description
General part information
CD74HCT174 Series
The ’HC174 and ’HCT174 are edge triggered flip-flops which utilize silicon gate CMOS circuitry to implement D-type flip-flops. They possess low power and speeds comparable to low power Schottky TTL circuits. The devices contain six master-slave flip-flops with a common clock and common reset. Data on the D input having the specified setup and hold times is transferred to the Q output on the low to high transition of the CLOCK input. The MR\ input, when low, sets all outputs to a low state.
Each output can drive ten low power Schottky TTL equivalent loads. The ’HCT174 is functional as well as, pin compatible to the ’LS174.
The ’HC174 and ’HCT174 are edge triggered flip-flops which utilize silicon gate CMOS circuitry to implement D-type flip-flops. They possess low power and speeds comparable to low power Schottky TTL circuits. The devices contain six master-slave flip-flops with a common clock and common reset. Data on the D input having the specified setup and hold times is transferred to the Q output on the low to high transition of the CLOCK input. The MR\ input, when low, sets all outputs to a low state.
Documents
Technical documentation and resources