
601G-21LFT
ObsoleteLOW PHASE NOISE CLOCK MULTIPLIER
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601G-21LFT
ObsoleteLOW PHASE NOISE CLOCK MULTIPLIER
Deep-Dive with AI
Technical Specifications
Parameters and characteristics for this part
| Specification | 601G-21LFT |
|---|---|
| Differential - Input:Output [x] | False |
| Differential - Input:Output [y] | True |
| Frequency - Max [Max] | 220 MHz |
| Input | Crystal, Clock |
| Mounting Type | Surface Mount |
| Number of Circuits | 1 |
| Operating Temperature [Max] | 70 °C |
| Operating Temperature [Min] | 0 °C |
| Output | LVPECL |
| Package / Case | 16-TSSOP |
| Package / Case [y] | 4.4 mm |
| Package / Case [y] | 0.173 in |
| PLL | True |
| Ratio - Input:Output | 2:1 |
| Supplier Device Package | 16-TSSOP |
| Voltage - Supply [Max] | 3.6 V |
| Voltage - Supply [Min] | 3 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | N/A | 0 | $ 0.00 | |
Description
General part information
601-21 Series
The ICS601-21 is a low-cost, low phase noise, high performance clock synthesizer for applications which require low phase noise and low jitter. It is Renesas’ lowest phase noise multiplier. Using Renesas’ patented analog and digital Phase Locked Loop (PLL) techniques, the chip accepts a crystal or clock input, and produces output clocks up to 230 MHz at 3.3 V. This product is intended for clock generation. It has low output jitter (variation in the output period), but input to output skew and jitter are not defined nor guaranteed.
Documents
Technical documentation and resources