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ROHM UT6KB5TCR
Discrete Semiconductor Products

UT6KC5TCR

Active
Rohm Semiconductor

DUAL MOSFET, N-CH, 60V, 3.5A, DFN2020 ROHS COMPLIANT: YES

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Search across all available documentation for this part.

DocumentsTechnical Data Sheet ENMOSFET Gate Resistor Setting for Motor Driving+36
ROHM UT6KB5TCR
Discrete Semiconductor Products

UT6KC5TCR

Active
Rohm Semiconductor

DUAL MOSFET, N-CH, 60V, 3.5A, DFN2020 ROHS COMPLIANT: YES

Deep-Dive with AI

DocumentsTechnical Data Sheet ENMOSFET Gate Resistor Setting for Motor Driving+36

Technical Specifications

Parameters and characteristics for this part

SpecificationUT6KC5TCR
Configuration2 N-Channel (Dual)
Current - Continuous Drain (Id) @ 25°C3.5 A
Drain to Source Voltage (Vdss)60 V
Gate Charge (Qg) (Max) @ Vgs3.1 nC
Input Capacitance (Ciss) (Max) @ Vds [Max]135 pF
Mounting TypeSurface Mount
Operating Temperature150 °C
Package / Case8-PowerUDFN
Power - Max [Max]2 W
Rds On (Max) @ Id, Vgs95 mOhm
Supplier Device PackageDFN2020-8D
TechnologyMOSFET (Metal Oxide)
Vgs(th) (Max) @ Id2.5 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyCut Tape (CT) 1$ 2.36
10$ 1.52
100$ 1.03
500$ 0.83
1000$ 0.76
Digi-Reel® 1$ 2.36
10$ 1.52
100$ 1.03
500$ 0.83
1000$ 0.76
N/A 806$ 1.94
Tape & Reel (TR) 3000$ 0.68
6000$ 0.66
NewarkEach (Supplied on Cut Tape) 1$ 2.03
10$ 1.57
25$ 1.39
50$ 1.21
100$ 1.01
250$ 0.86
500$ 0.66
1000$ 0.62

Description

General part information

UT6KC5 Series

UT6KC5 is a low on-resistance MOSFET ideal for switching applications. This product includes two Nch 60V MOSFETs in DFN package.

Documents

Technical documentation and resources

Technical Data Sheet EN

Datasheet

MOSFET Gate Resistor Setting for Motor Driving

Technical Article

Taping Information

Package Information

Basics of Thermal Resistance and Heat Dissipation

Thermal Design

What Is Thermal Design

Thermal Design

Method for Monitoring Switching Waveform

Schematic Design & Verification

Notes for Calculating Power Consumption:Static Operation

Thermal Design

Notes for Temperature Measurement Using Thermocouples

Thermal Design

UT6KC5 ESD Data

Characteristics Data

Compliance of the RoHS directive

Environmental Data

Method for Calculating Junction Temperature from Transient Thermal Resistance Data

Thermal Design

Measurement Method and Usage of Thermal Resistance RthJC

Thermal Design

Anti-Whisker formation - Transistors

Package Information

Calculation of Power Dissipation in Switching Circuit

Schematic Design & Verification

How to Use LTspice® Models: Tips for Improving Convergence

Schematic Design & Verification

Impedance Characteristics of Bypass Capacitor

Schematic Design & Verification

Inner Structure

Package Information

Package Dimensions

Package Information

Certificate of not containing SVHC under REACH Regulation

Environmental Data

P-channel Power MOSFETs selection guide

Technical Article

Types and Features of Transistors

Application Note

How to Use LTspice® Models

Schematic Design & Verification

PCB Layout Thermal Design Guide

Thermal Design

Part Explanation

Application Note

List of Transistor Package Thermal Resistance

Thermal Design

Explanation for Marking

Package Information

Notes for Temperature Measurement Using Forward Voltage of PN Junction

Thermal Design

Precautions When Measuring the Rear of the Package with a Thermocouple

Thermal Design

Condition of Soldering / Land Pattern Reference

Package Information

Overview of ROHM's Simulation Models(for ICs and Discrete Semiconductors)

Technical Article

MOSFET Gate Drive Current Setting for Motor Driving

Technical Article

Moisture Sensitivity Level - Transistors

Package Information

Importance of Probe Calibration When Measuring Power: Deskew

Schematic Design & Verification

About Flammability of Materials

Environmental Data

About Export Regulations

Export Information

What is a Thermal Model? (Transistor)

Thermal Design

Two-Resistor Model for Thermal Simulation

Thermal Design

Temperature derating method for Safe Operating Area (SOA)

Schematic Design & Verification