
MK2058-01SILFTR
ObsoleteCOMMUNICATIONS CLOCK JITTER ATTENUATOR
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MK2058-01SILFTR
ObsoleteCOMMUNICATIONS CLOCK JITTER ATTENUATOR
Deep-Dive with AI
Technical Specifications
Parameters and characteristics for this part
| Specification | MK2058-01SILFTR |
|---|---|
| Differential - Input:Output | False |
| Divider/Multiplier | Yes/No |
| Frequency - Max [Max] | 27 MHz |
| Input | LVCMOS |
| Mounting Type | Surface Mount |
| Number of Circuits | 1 |
| Operating Temperature [Max] | 85 °C |
| Operating Temperature [Min] | -40 °C |
| Output | LVCMOS |
| Package / Case | 20-SOIC |
| Package / Case [y] | 0.295 in |
| Package / Case [y] | 7.5 mm |
| PLL | True |
| Ratio - Input:Output | 2:1 |
| Supplier Device Package | 20-SOIC |
| Type | Clock Jitter Attenuator |
| Voltage - Supply [Max] | 3.45 V |
| Voltage - Supply [Min] | 3.15 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
Description
General part information
MK2058-01 Series
The MK2058-01 is a VCXO (Voltage Controlled Crystal Oscillator) based clock jitter attenuator designed for system clock distribution applications. This monolithic IC, combined with an external inexpensive quartz crystal, can be used to replace a more costly hybrid VCXO retiming module. The device accepts and outputs the same clock frequency in selectable ranges covering 4 kHz to 27 MHz. A dual input mux is also provided. By controlling the VCXO frequency within a phase-locked loop (PLL), the output clock is phase and frequency locked to the input clock. Through selection of external loop filter components, the PLL loop bandwidth and damping factor can be tailored to meet system clock requirements. A loop bandwidth down to the Hz range is possible.
Documents
Technical documentation and resources