
SN74ABT18640DL
ActiveSCAN TEST DEVICES WITH 18-BIT INVERTING BUS TRANSCEIVERS
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SN74ABT18640DL
ActiveSCAN TEST DEVICES WITH 18-BIT INVERTING BUS TRANSCEIVERS
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Technical Specifications
Parameters and characteristics for this part
| Specification | SN74ABT18640DL |
|---|---|
| Logic Type | Scan Test Device with Inverting Bus Transceivers |
| Mounting Type | Surface Mount |
| Operating Temperature [Max] | 85 °C |
| Operating Temperature [Min] | -40 °C |
| Package / Case | 0.295 in |
| Package / Case | 56-BSSOP |
| Package / Case | 7.5 mm |
| Supplier Device Package | 56-SSOP |
| Supply Voltage [Max] | 5.5 V |
| Supply Voltage [Min] | 4.5 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | Tube | 80 | $ 10.40 | |
| Texas Instruments | TUBE | 1 | $ 10.48 | |
| 100 | $ 9.16 | |||
| 250 | $ 7.06 | |||
| 1000 | $ 6.32 | |||
Description
General part information
SN74ABT18640 Series
The 'ABT18640 scan test devices with 18-bit inverting bus transceivers are members of the Texas Instruments SCOPETMtestability integrated-circuit family. This family of devices supports IEEE Standard 1149.1-1990 boundary scan to facilitate testing of complex circuit-board assemblies. Scan access to the test circuitry is accomplished via the 4-wire test access port (TAP) interface.
In the normal mode, these devices are 18-bit inverting bus transceivers. They can be used either as two 9-bit transceivers or one 18-bit transceiver. The test circuitry can be activated by the TAP to take snapshot samples of the data appearing at the device pins or to perform a self test on the boundary-test cells. Activating the TAP in the normal mode does not affect the functional operation of the SCOPETMbus transceivers.
Data flow is controlled by the direction-control (DIR) and output-enable () inputs. Data transmission is allowed from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at DIR.can be used to disable the device so that the buses are effectively isolated.
Documents
Technical documentation and resources