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TLC320AD50IDW

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Texas Instruments

SINGLE CHANNEL CODEC W/MASTER-SLAVE FUNCTION (3 SLAVES) AND 89 DB SNR

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SOIC (DW)
Integrated Circuits (ICs)

TLC320AD50IDW

Active
Texas Instruments

SINGLE CHANNEL CODEC W/MASTER-SLAVE FUNCTION (3 SLAVES) AND 89 DB SNR

Technical Specifications

Parameters and characteristics for this part

SpecificationTLC320AD50IDW
Data InterfaceSerial
Dynamic Range, ADCs / DACs (db) Typ [custom]88 db
Dynamic Range, ADCs / DACs (db) Typ [custom]88 db
Mounting TypeSurface Mount
Number of ADCs / DACs [custom]1
Number of ADCs / DACs [custom]1
Operating Temperature [Max]85 °C
Operating Temperature [Min]-40 °C
Package / Case28-SOIC
Package / Case [x]0.295 in
Package / Case [y]7.5 mm
Resolution (Bits)16 b
S/N Ratio, ADCs / DACs (db) Typ [custom]89 db
S/N Ratio, ADCs / DACs (db) Typ [custom]89 db
Sigma DeltaTrue
Supplier Device Package28-SOIC
TypeGeneral Purpose
Voltage - Supply, Analog [Max]5.5 V
Voltage - Supply, Analog [Min]4.75 V
Voltage - Supply, Digital [Max]5.5 V
Voltage - Supply, Digital [Min]4.5 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyTube 40$ 36.16
Texas InstrumentsTUBE 1$ 39.37
100$ 34.99
250$ 28.77
1000$ 25.73

Description

General part information

TLC320AD50 Series

The TLC320AD50C, TLC320AD50I, and TLC320AD52C provide high-resolution signal conversion from digital-to-analog (D/A) and from analog-to-digital (A/D) using oversampling sigma-delta technology. This device consists of a pair of 16-bit synchronous serial conversion paths (one for each direction) and includes an interpolation filter before the DAC and a decimation filter after the ADC. Other overhead functions on the chip include timing (sample rate, FSD delay) and control (programmable gain amplifier, PLL, communication protocol, etc.). The sigma-delta architecture produces high resolution A/D and D/A conversion at a low system cost.

Programmable functions of this device can be selected through the serial interface. Options include reset, power down, communications protocol, signal sampling rate, gain control, and system test modes (see section 6). The TLC320AD50C and TLC320AD52C are characterized for operation from 0°C to 70°C, and the TLC320AD50I is characterized for operation from \x9640°C to 85°C.

The TLC320AD50C, TLC320AD50I, and TLC320AD52C provide high-resolution signal conversion from digital-to-analog (D/A) and from analog-to-digital (A/D) using oversampling sigma-delta technology. This device consists of a pair of 16-bit synchronous serial conversion paths (one for each direction) and includes an interpolation filter before the DAC and a decimation filter after the ADC. Other overhead functions on the chip include timing (sample rate, FSD delay) and control (programmable gain amplifier, PLL, communication protocol, etc.). The sigma-delta architecture produces high resolution A/D and D/A conversion at a low system cost.