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M38510/65705BSA
Integrated Circuits (ICs)

SNJ54LVC373AW

Active
Texas Instruments

OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS

Deep-Dive with AI

Search across all available documentation for this part.

DocumentsDatasheetUse of the CMOS Unbuffered Inverter in Oscillator Circuits+26
M38510/65705BSA
Integrated Circuits (ICs)

SNJ54LVC373AW

Active
Texas Instruments

OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS

Deep-Dive with AI

DocumentsDatasheetUse of the CMOS Unbuffered Inverter in Oscillator Circuits+26

Technical Specifications

Parameters and characteristics for this part

SpecificationSNJ54LVC373AW
Circuit [custom]8
Circuit [custom]8
Current - Output High, Low24 mA
Delay Time - Propagation1 ns
Independent Circuits1
Logic TypeD-Type Transparent Latch
Mounting TypeSurface Mount
Operating Temperature [Max]125 °C
Operating Temperature [Min]-55 °C
Output TypeTri-State, Non-Inverted
Package / Case20-CFlatPack
Supplier Device Package20-CFP
Voltage - Supply [Max]3.6 V
Voltage - Supply [Min]2 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
Texas InstrumentsTUBE 1$ 45.93
100$ 40.83
250$ 33.56
1000$ 30.02

Description

General part information

SN54LVC373A Series

The SN54LVC373A octal transparent D-type latch is designed for 2.7-V to 3.6-V VCCoperation, and the SN74LVC373A octal transparent D-type latch is designed for 1.65-V to 3.6-V VCCoperation.

The SN54LVC373A octal transparent D-type latch is designed for 2.7-V to 3.6-V VCCoperation, and the SN74LVC373A octal transparent D-type latch is designed for 1.65-V to 3.6-V VCCoperation.

Documents

Technical documentation and resources

Datasheet

Datasheet

Use of the CMOS Unbuffered Inverter in Oscillator Circuits

Application note

Migration From 3.3-V To 2.5-V Power Supplies For Logic Devices

Application note

Standard Linear & Logic for PCs, Servers & Motherboards

More literature

Logic Guide (Rev. AB)

Selection guide

Texas Instruments Little Logic Application Report

Application note

Power-Up Behavior of Clocked Devices (Rev. B)

Application note

Little Logic Guide 2018 (Rev. G)

Selection guide

Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)

Application note

How to Select Little Logic (Rev. A)

Application note

Signal Switch Data Book (Rev. A)

User guide

CMOS Power Consumption and CPD Calculation (Rev. B)

Application note

Selecting the Right Level Translation Solution (Rev. A)

Application note

Understanding Advanced Bus-Interface Products Design Guide

Application note

TI IBIS File Creation, Validation, and Distribution Processes

Application note

Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A)

Application note

STANDARD LINEAR AND LOGIC FOR DVD/VCD PLAYERS

More literature

Live Insertion

Application note

Input and Output Characteristics of Digital Integrated Circuits

Application note

Power-Up 3-State (PU3S) Circuits in TI Standard Logic Devices

Application note

16-Bit Widebus Logic Families in 56-Ball, 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B)

Application note

LOGIC Pocket Data Book (Rev. B)

User guide

Semiconductor Packing Material Electrostatic Discharge (ESD) Protection

Application note

LVC Characterization Information

Application note

LVC and LV Low-Voltage CMOS Logic Data Book (Rev. B)

User guide

Low-Voltage Logic (LVC) Designer's Guide

Design guide

Design Summary for WCSP Little Logic (Rev. B)

Product overview

Implications of Slow or Floating CMOS Inputs (Rev. E)

Application note