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Integrated Circuits (ICs)

CD74HCT161E

Active
Texas Instruments

HIGH SPEED CMOS LOGIC 4-BIT BINARY COUNTER WITH ASYNCHRONOUS RESET

PDIP (N)
Integrated Circuits (ICs)

CD74HCT161E

Active
Texas Instruments

HIGH SPEED CMOS LOGIC 4-BIT BINARY COUNTER WITH ASYNCHRONOUS RESET

Technical Specifications

Parameters and characteristics for this part

SpecificationCD74HCT161E
Count Rate20 MHz
DirectionUp
Logic TypeBinary Counter
Mounting TypeThrough Hole
Number of Bits per Element4
Number of Elements1
Operating Temperature [Max]125 °C
Operating Temperature [Min]-55 °C
Package / Case0.3 in
Package / Case16-DIP
Package / Case7.62 mm
ResetAsynchronous
Supplier Device Package16-PDIP
TimingSynchronous
Trigger TypePositive Edge
Voltage - Supply [Max]5.5 V
Voltage - Supply [Min]4.5 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyTube 1$ 0.99
10$ 0.89
25$ 0.84
100$ 0.69
250$ 0.65
500$ 0.57
1000$ 0.45
2500$ 0.42
5000$ 0.40
Texas InstrumentsTUBE 1$ 0.94
100$ 0.64
250$ 0.49
1000$ 0.33

Description

General part information

CD74HCT161 Series

The ’HC161, ’HCT161, ’HC163, and ’HCT163 are presettable synchronous counters that feature look-ahead carry logic for use in high-speed counting applications. The ’HC161 and ’HCT161 are asynchronous reset decade and binary counters, respectively; the ’HC163 and ’HCT163 devices are decade and binary counters, respectively, that are reset synchronously with the clock. Counting and parallel presetting are both accomplished synchronously with the negative-to-positive transition of the clock.

A low level on the synchronous parallel enable input, SPE, disables counting operation and allows data at the P0 to P3 inputs to be loaded into the counter (provided that the setup and hold requirements for SPE are met).

All counters are reset with a low level on the Master Reset input, MR. In the ’HC163 and ’HCT163 counters (synchronous reset types), the requirements for setup and hold time with respect to the clock must be met.