Specification	SN74AHCT00PWR

Current - Output High, Low [custom]	8 mA
Current - Output High, Low [custom]	8 mA
Input Logic Level - Low	0.8 V
Logic Type	NAND Gate
Max Propagation Delay @ V, Max CL	7.9 ns
Mounting Type	Surface Mount
Number of Circuits	4
Number of Inputs	2
Operating Temperature [Max]	85 °C
Operating Temperature [Min]	-40 °C
Package / Case	14-TSSOP
Package / Case [custom]	0.173 "
Package / Case [custom]	4.4 mm
Supplier Device Package	14-TSSOP
Voltage - Supply [Max]	5.5 V
Voltage - Supply [Min]	4.5 V

SN74AHCT00-EP Series

Enhanced product 4-ch, 2-input, 4.5-V to 5.5-V NAND gates with TTL-compatible CMOS inputs

Part	Number of Circuits	Input Logic Level - Low	Number of Inputs	Voltage - Supply [Min]	Voltage - Supply [Max]	Current - Output High, Low [custom]	Current - Output High, Low [custom]	Package / Case [x]	Package / Case [y]	Package / Case	Max Propagation Delay @ V, Max CL	Mounting Type	Operating Temperature [Max]	Operating Temperature [Min]	Logic Type	Supplier Device Package	Grade	Package / Case [custom]	Package / Case [custom]	Qualification
Texas Instruments SN74AHCT00DR	4	0.8 V	2	4.5 V	5.5 V	8 mA	8 mA	0.154 in	3.9 mm	14-SOIC	7.9 ns	Surface Mount	85 °C	-40 °C	NAND Gate
Texas Instruments SN74AHCT00NSRG4	4	0.8 V	2	4.5 V	5.5 V	8 mA	8 mA	0.209 "	5.3 mm	14-SOIC	7.9 ns	Surface Mount	85 °C	-40 °C	NAND Gate	14-SO
Texas Instruments SN74AHCT00QPWRG4Q1	4	0.8 V	2	4.5 V	5.5 V	8 mA	8 mA			14-TSSOP	7.9 ns	Surface Mount	125 °C	-40 °C	NAND Gate	14-TSSOP	Automotive	0.173 "	4.4 mm	AEC-Q100
Texas Instruments SN74AHCT00N	4	0.8 V	2	4.5 V	5.5 V	8 mA	8 mA	0.3 "	7.62 mm	14-DIP	7.9 ns	Through Hole	85 °C	-40 °C	NAND Gate
Texas Instruments SN74AHCT00QDRG4Q1	4	0.8 V	2	4.5 V	5.5 V	8 mA	8 mA	0.154 in	3.9 mm	14-SOIC	7.9 ns	Surface Mount	125 °C	-40 °C	NAND Gate		Automotive			AEC-Q100
Texas Instruments SN74AHCT00DRG4	4	0.8 V	2	4.5 V	5.5 V	8 mA	8 mA	0.154 in	3.9 mm	14-SOIC	7.9 ns	Surface Mount	85 °C	-40 °C	NAND Gate
Texas Instruments SN74AHCT00PWR	4	0.8 V	2	4.5 V	5.5 V	8 mA	8 mA			14-TSSOP	7.9 ns	Surface Mount	85 °C	-40 °C	NAND Gate	14-TSSOP		0.173 "	4.4 mm
Texas Instruments SN74AHCT00NSR	4	0.8 V	2	4.5 V	5.5 V	8 mA	8 mA	0.209 "	5.3 mm	14-SOIC	7.9 ns	Surface Mount	85 °C	-40 °C	NAND Gate	14-SO
Texas Instruments SN74AHCT00MPWREP	4	0.8 V	2	4.5 V	5.5 V	8 mA	8 mA			14-TSSOP	7.9 ns	Surface Mount	125 °C	-55 °C	NAND Gate	14-TSSOP		0.173 "	4.4 mm
Texas Instruments SN74AHCT00PW	4	0.8 V	2	4.5 V	5.5 V	8 mA	8 mA			14-TSSOP	7.9 ns	Surface Mount	85 °C	-40 °C	NAND Gate	14-TSSOP		0.173 "	4.4 mm

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

Distributor	Package	Quantity	$

Digikey	Cut Tape (CT)	1	$ 0.38
		10	$ 0.30
		25	$ 0.28
		100	$ 0.21
		250	$ 0.19
		500	$ 0.16
		1000	$ 0.12
	Digi-Reel®	1	$ 0.38
		10	$ 0.30
		25	$ 0.28
		100	$ 0.21
		250	$ 0.19
		500	$ 0.16
		1000	$ 0.12
	Tape & Reel (TR)	2000	$ 0.11
		6000	$ 0.10
		10000	$ 0.09
		50000	$ 0.08
		100000	$ 0.08
Texas Instruments	LARGE T&R	1	$ 0.20
		100	$ 0.14
		250	$ 0.11
		1000	$ 0.07

Description

General part information

SN74AHCT00-EP Series

The ’AHCT00 device performs the Boolean function Y = (A • B)\ or Y = A\ + B\ in positive logic.

Documents

Technical documentation and resources

Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A)

Application note

Selecting the Right Level Translation Solution (Rev. A)

Application note

Logic Guide (Rev. AB)

Selection guide

How to Select Little Logic (Rev. A)

Application note

CMOS Power Consumption and CPD Calculation (Rev. B)

Application note

Texas Instruments Little Logic Application Report

Application note

Military Advanced High-Speed CMOS Logic (AHC/AHCT) (Rev. C)

Product overview

AHC/AHCT Designer's Guide February 2000 (Rev. D)

Design guide

SN74AHCT00PWR

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SN74AHCT00PWR

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Technical Specifications

SN74AHCT00-EP Series

Pricing

Description

SN74AHCT00-EP Series

Documents

TI IBIS File Creation, Validation, and Distribution Processes

Live Insertion

Semiconductor Packing Material Electrostatic Discharge (ESD) Protection

LOGIC Pocket Data Book (Rev. B)

Migration From 3.3-V To 2.5-V Power Supplies For Logic Devices

Design Summary for WCSP Little Logic (Rev. B)

Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)

Implications of Slow or Floating CMOS Inputs (Rev. E)

Little Logic Guide 2018 (Rev. G)

Advanced High-Speed CMOS (AHC) Logic Family (Rev. C)

SNx4AHCT00 Quadruple 2-Input Positive-NAND Gates datasheet (Rev. L)

Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A)

Selecting the Right Level Translation Solution (Rev. A)

Logic Guide (Rev. AB)

How to Select Little Logic (Rev. A)

CMOS Power Consumption and CPD Calculation (Rev. B)

Texas Instruments Little Logic Application Report

Military Advanced High-Speed CMOS Logic (AHC/AHCT) (Rev. C)

AHC/AHCT Designer's Guide February 2000 (Rev. D)

SN74AHCT00-EP Series