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48 VQFN
Integrated Circuits (ICs)

DS90UB638TRGZTQ1

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Texas Instruments

4.16-GBPS SINGLE INPUT DESERIALIZER WITH MIPI CSI-2 OUTPUT PORT

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48 VQFN
Integrated Circuits (ICs)

DS90UB638TRGZTQ1

Active
Texas Instruments

4.16-GBPS SINGLE INPUT DESERIALIZER WITH MIPI CSI-2 OUTPUT PORT

Deep-Dive with AI

DocumentsDatasheet

Technical Specifications

Parameters and characteristics for this part

SpecificationDS90UB638TRGZTQ1
Data Rate4.16 Gbps
FunctionDeserializer
GradeAutomotive
Input TypeFPD-Link III
Mounting TypeSurface Mount
Number of Inputs1
Number of Outputs6
Operating Temperature [Max]105 °C
Operating Temperature [Min]-40 °C
Output TypeCSI-2, MIPI
Package / Case48-VFQFN Exposed Pad
QualificationAEC-Q100
Supplier Device Package48-VQFN (7x7)
Voltage - Supply [Max]1.89 V, 1.155 V
Voltage - Supply [Min]1.71 V, 1.045 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyCut Tape (CT) 1$ 11.39
10$ 10.29
25$ 9.81
100$ 8.52
Digi-Reel® 1$ 11.39
10$ 10.29
25$ 9.81
100$ 8.52
Tape & Reel (TR) 250$ 8.14
500$ 7.42
1250$ 6.46
Texas InstrumentsSMALL T&R 1$ 8.72
100$ 7.11
250$ 5.59
1000$ 4.74

Description

General part information

DS90UB638-Q1 Series

The DS90UB638-Q1 is a versatile deserializer capable of receiving serialized sensor data from a source through an FPD-Link III interface. When paired with a DS90UB635-Q1 serializer, the DS90UB638-Q1 receives data from imagers, supporting 2MP/60fps and 4MP/30fps cameras, as well as satellite RADAR and other sensors such as ToF and LIDAR. Data is received and presented at a MIPI CSI-2 compliant output for interconnect to a downstream processor. When configuring the CSI-2 interface for 2-lane operation, a duplicate MIPI CSI-2 clock lane is available to provide a replicated output. Replication mode creates two copies of the received video stream for data logging and parallel processing.

The DS90UB638-Q1 is AEC-Q100 qualified and designed to receive data across a 50-Ω, single-ended coaxial. The deserializer is ideal for Power-over-Coax applications and the receive equalizer automatically adapts to compensate for cable loss characteristics with no additional programming required, including degradation over time.

Each FPD-Link III interface includes a separate low latency bidirectional control channel (BCC) that continuously conveys I2C, GPIO, and other control information. GPIO signals purposed for sensor synchronization and diagnostic features also make use of the BCC.

Documents

Technical documentation and resources