Zenode.ai Logo
Beta
JM38510/37204B2A
Integrated Circuits (ICs)

JM38510/37204B2A

Active
Texas Instruments

OCTAL D-TYPE EDGE TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS

Deep-Dive with AI

Search across all available documentation for this part.

JM38510/37204B2A
Integrated Circuits (ICs)

JM38510/37204B2A

Active
Texas Instruments

OCTAL D-TYPE EDGE TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS

Technical Specifications

Parameters and characteristics for this part

SpecificationJM38510/37204B2A
Clock Frequency30 MHz
Current - Output High, Low [custom]12 mA
Current - Output High, Low [custom]1 mA
Current - Quiescent (Iq)31 mA
FunctionStandard
Max Propagation Delay @ V, Max CL17 ns
Mounting TypeSurface Mount
Number of Bits per Element8
Number of Elements1
Operating Temperature [Max]125 °C
Operating Temperature [Min]-55 °C
Output TypeTri-State, Non-Inverted
Package / Case20-CLCC
Supplier Device Package20-LCCC (8.89x8.89)
Trigger TypePositive Edge
TypeD-Type
Voltage - Supply [Max]5.5 V
Voltage - Supply [Min]4.5 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
Texas InstrumentsTUBE 1$ 62.82
100$ 55.84
250$ 45.90
1000$ 41.06

Description

General part information

SN54ALS374A Series

These octal D-type edge-triggered flip-flops feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.

On the positive transition of the clock (CLK) input, the Q outputs are set to the logic levels set up at the data (D) inputs.

A buffered output-enable (OE\) input places the eight outputs in either a normal logic state (high or low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and the increased drive provide the capability to drive bus lines without interface or pullup components.