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PAP-64-TQFP Exp Pad Pkg
Integrated Circuits (ICs)

ADS1610IPAPR

NRND
Texas Instruments

16-BIT, 10MSPS DELTA-SIGMA ANALOG-TO-DIGITAL CONVERTER

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PAP-64-TQFP Exp Pad Pkg
Integrated Circuits (ICs)

ADS1610IPAPR

NRND
Texas Instruments

16-BIT, 10MSPS DELTA-SIGMA ANALOG-TO-DIGITAL CONVERTER

Technical Specifications

Parameters and characteristics for this part

SpecificationADS1610IPAPR
ArchitectureSigma-Delta
ConfigurationADC
Data InterfaceParallel
Input TypeDifferential
Mounting TypeSurface Mount
Number of A/D Converters1
Number of Bits16
Number of Inputs1
Operating Temperature [Max]85 °C
Operating Temperature [Min]-40 °C
Package / Case64-PowerTQFP
Reference TypeExternal, Internal
Sampling Rate (Per Second)10 M
Supplier Device Package64-HTQFP (10x10)
Voltage - Supply, Analog5 V
Voltage - Supply, Digital [Max]3.3 V
Voltage - Supply, Digital [Min]2.7 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyTape & Reel (TR) 1000$ 29.73
Texas InstrumentsLARGE T&R 1$ 40.47
100$ 35.97
250$ 29.57
1000$ 26.45

Description

General part information

ADS1610 Series

The ADS1610 is a high-speed, high-precision, delta-sigma () analog-to-digital converter (ADC) with 16-bit resolution operating from a 5V analog and a 3V digital supply. Featuring an advanced multi-stage analog modulator combined with an on-chip digital decimation filter, the ADS1610 achieves 86 dBFS signal-to-noise ratio (SNR) in a 5MHz signal bandwidth; while the total harmonic distortion is -94dB.

The ADS1610topology provides key system-level design advantages with respect to anti-alias filtering and clock jitter. The design of the user's front-end anti-alias filter is simplified since the on-chip digital filter greatly attenuates out-of-band signals. The ADS1610s filter has abrick wallresponse with a very flat passband (±0.0002dB of ripple) followed immediately by a very wide stop band (5MHz to 55MHz). Clock jitter becomes especially critical when digitizing high frequency, large-amplitude signals. The ADS1610 significantly reduces clock jitter sensitivity by an effective averaging of clock jitter as a result of oversampling the input signal.

Output data is supplied over a parallel interface and easily connects to TMS320 digital signal processors (DSPs). The power dissipation can be adjusted with an external resistor, allowing for reduction at lower operating speeds.