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SOIC (D)
Integrated Circuits (ICs)

SN74LVC126AQDRG4Q1

Active
Texas Instruments

1 24MA 1.65V~3.6V 24MA 4 SOIC-14 BUFFERS, DRIVERS, RECEIVERS, TRANSCEIVERS ROHS

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SOIC (D)
Integrated Circuits (ICs)

SN74LVC126AQDRG4Q1

Active
Texas Instruments

1 24MA 1.65V~3.6V 24MA 4 SOIC-14 BUFFERS, DRIVERS, RECEIVERS, TRANSCEIVERS ROHS

Technical Specifications

Parameters and characteristics for this part

SpecificationSN74LVC126AQDRG4Q1
Current - Output High, Low24 mA
GradeAutomotive
Logic TypeBuffer, Non-Inverting
Mounting TypeSurface Mount
Number of Bits per Element1
Number of Elements4
Operating Temperature [Max]125 °C
Operating Temperature [Min]-40 °C
Output Type3-State
Package / Case14-SOIC
Package / Case [x]0.154 in
Package / Case [y]3.9 mm
QualificationAEC-Q100
Voltage - Supply [Max]3.6 V
Voltage - Supply [Min]1.65 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyCut Tape (CT) 1$ 0.44
10$ 0.37
25$ 0.35
100$ 0.28
250$ 0.26
500$ 0.22
1000$ 0.17
Digi-Reel® 1$ 0.44
10$ 0.37
25$ 0.35
100$ 0.28
250$ 0.26
500$ 0.22
1000$ 0.17
Tape & Reel (TR) 2500$ 0.17
LCSCPiece 1$ 0.51
200$ 0.20
500$ 0.19
1000$ 0.19
Texas InstrumentsLARGE T&R 1$ 0.38
100$ 0.26
250$ 0.20
1000$ 0.13

Description

General part information

SN74LVC126A-Q1 Series

The SN74LVC126A device is a quadruple bus buffer gate designed for 1.65V to 3.6V VCC operation.

The SN74LVC126A device features independent line drivers with 3-state outputs. Each output is disabled when the associated output-enable (OE) input is low.

To ensure the high-impedance state during power up or power down, OE must be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver.

Documents

Technical documentation and resources

LVC Characterization Information

Application note

How to Select Little Logic (Rev. A)

Application note

TI IBIS File Creation, Validation, and Distribution Processes

Application note

Input and Output Characteristics of Digital Integrated Circuits

Application note

Implications of Slow or Floating CMOS Inputs (Rev. E)

Application note

Selecting the Right Level Translation Solution (Rev. A)

Application note

Migration From 3.3-V To 2.5-V Power Supplies For Logic Devices

Application note

Low-Voltage Logic (LVC) Designer's Guide

Design guide

Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A)

Application note

Little Logic Guide 2018 (Rev. G)

Selection guide

Power-Up 3-State (PU3S) Circuits in TI Standard Logic Devices

Application note

Signal Switch Data Book (Rev. A)

User guide

Design Summary for WCSP Little Logic (Rev. B)

Product overview

LVC and LV Low-Voltage CMOS Logic Data Book (Rev. B)

User guide

STANDARD LINEAR AND LOGIC FOR DVD/VCD PLAYERS

More literature

Semiconductor Packing Material Electrostatic Discharge (ESD) Protection

Application note

LOGIC Pocket Data Book (Rev. B)

User guide

Logic Guide (Rev. AB)

Selection guide

Standard Linear & Logic for PCs, Servers & Motherboards

More literature

Texas Instruments Little Logic Application Report

Application note

Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)

Application note

Live Insertion

Application note

CMOS Power Consumption and CPD Calculation (Rev. B)

Application note

SN74LVC126A-Q1 Automotive Quadruple Bus Buffer Gate With 3-State Outputs datasheet (Rev. D)

Data sheet

Understanding Advanced Bus-Interface Products Design Guide

Application note

16-Bit Widebus Logic Families in 56-Ball, 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B)

Application note

Use of the CMOS Unbuffered Inverter in Oscillator Circuits

Application note