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TSSOP (DGG)
Integrated Circuits (ICs)

SN74LVTH16245ADGGR

Active
Texas Instruments

3.3-V ABT 16-BIT BUS TRANSCEIVERS WITH 3-STATE OUTPUTS

TSSOP (DGG)
Integrated Circuits (ICs)

SN74LVTH16245ADGGR

Active
Texas Instruments

3.3-V ABT 16-BIT BUS TRANSCEIVERS WITH 3-STATE OUTPUTS

Technical Specifications

Parameters and characteristics for this part

SpecificationSN74LVTH16245ADGGR
Current - Output High, Low [custom]64 mA
Current - Output High, Low [custom]32 mA
Mounting TypeSurface Mount
Number of Bits per Element8
Number of Elements2
Operating Temperature [Max]85 °C
Operating Temperature [Min]-40 °C
Output Type3-State
Package / Case48-TFSOP
Package / Case0.24 in
Package / Case [custom]6.1 mm
Supplier Device Package48-TSSOP
Voltage - Supply [Max]3.6 V
Voltage - Supply [Min]2.7 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyCut Tape (CT) 1$ 2.09
10$ 1.34
25$ 1.14
100$ 0.91
250$ 0.81
500$ 0.74
1000$ 0.68
Digi-Reel® 1$ 2.09
10$ 1.34
25$ 1.14
100$ 0.91
250$ 0.81
500$ 0.74
1000$ 0.68
Tape & Reel (TR) 2000$ 0.64
4000$ 0.60
6000$ 0.58
10000$ 0.56
14000$ 0.54
Texas InstrumentsLARGE T&R 1$ 1.02
100$ 0.78
250$ 0.58
1000$ 0.41

Description

General part information

SN74LVTH16245A Series

The 'LVTH16245A devices are 16-bit (dual-octal) noninverting 3-state transceivers designed for low-voltage (3.3-V) VCCoperation, but with the capability to provide a TTL interface to a 5-V system environment.

The devices are designed for asynchronous communication between two data buses. The logic levels of the direction-control (DIR) input and the output-enable (OE) input activate either the B-port outputs or the A-port outputs or place both output ports into the high-impedance mode. The device transmits data from the A bus to the B bus when the B-port outputs are activated, and from the B bus to the A bus when the A-port outputs are activated. The input circuitry on both A and B ports is always active and must have a logic HIGH or LOW level applied to prevent excess ICCand ICCZ.

Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended.