
MC100EPT25MNR4G
ActiveTRANSLATOR, 2 INPUT, 1.6 NS, 3 V TO 3.6 V, 8 PINS, DFN-EP

MC100EPT25MNR4G
ActiveTRANSLATOR, 2 INPUT, 1.6 NS, 3 V TO 3.6 V, 8 PINS, DFN-EP
Technical Specifications
Parameters and characteristics for this part
| Specification | MC100EPT25MNR4G |
|---|---|
| Channel Type | Unidirectional |
| Channels per Circuit | 1 |
| Input Signal | ECL |
| Mounting Type | Surface Mount |
| Number of Circuits | 1 |
| Operating Temperature [Max] | 85 °C |
| Operating Temperature [Min] | -40 °C |
| Output Signal | LVTTL |
| Output Type | Non-Inverted |
| Package / Case | 8-VFDFN Exposed Pad |
| Supplier Device Package | 8-DFN (2x2) |
| Translator Type | Mixed Signal |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
Description
General part information
MC100EPT25 Series
The MC100EPT25 is a Differential LVECL/ECL to LVTTL translator. This device requires +3.3V, -3.3V to -5.2V, and ground. The small outline 8-lead SOIC package and the single gate of the EPT25 make it ideal for applications which require the translation of a clock or data signal.The VBBoutput allows the EPT25 to also be used in a single-ended input mode. In this mode the VBBoutput is tied to the D input for a inverting buffer or the Dbar input for a non-inverting buffer. If used, the VBBpin should be bypassed to ground with at least a 0.01 µF capacitor.
Documents
Technical documentation and resources