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16 SO
Integrated Circuits (ICs)

SN74LS390NSR

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Texas Instruments

COUNTER/DIVIDER DUAL 4-BIT DECADE UP 16-PIN SOP T/R

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16 SO
Integrated Circuits (ICs)

SN74LS390NSR

Active
Texas Instruments

COUNTER/DIVIDER DUAL 4-BIT DECADE UP 16-PIN SOP T/R

Technical Specifications

Parameters and characteristics for this part

SpecificationSN74LS390NSR
Count Rate35 MHz
DirectionUp
Logic TypeCounter, Decade
Mounting TypeSurface Mount
Number of Bits per Element4
Number of Elements2
Operating Temperature [Max]70 °C
Operating Temperature [Min]0 °C
Package / Case0.209 "
Package / Case16-SOIC
Package / Case5.3 mm
ResetAsynchronous
Supplier Device Package16-SO
Trigger TypeNegative Edge
Voltage - Supply [Max]5.25 V
Voltage - Supply [Min]4.75 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyCut Tape (CT) 1$ 2.05
10$ 1.84
25$ 1.73
100$ 1.48
250$ 1.39
500$ 1.21
1000$ 1.01
Digi-Reel® 1$ 2.05
10$ 1.84
25$ 1.73
100$ 1.48
250$ 1.39
500$ 1.21
1000$ 1.01
Tape & Reel (TR) 2000$ 0.94
6000$ 0.90
10000$ 0.87
Texas InstrumentsLARGE T&R 1$ 1.77
100$ 1.46
250$ 1.05
1000$ 0.79

Description

General part information

SN74LS390 Series

Each of these monolithic circuits contains eight master-slave flip-flops and additional gating to implement two individual four-bit counters in a single package. The '390 and 'LS390 incorporate dual divide-by-two and divide-by-five counters, which can be used to implement cycle lengths equal to any whole and/or cumulative multiples of 2 and/or 5 up to divide-by-100. When connected as a bi-quinary counter, the separate divide-by-two circuit can be used to provide symmetry (a square wave) at the final output stage. The '393 and 'LS393 each comprise two independent four-bit binary counters each having a clear and a clock input. N-bit binary counters can be implemented with each package providing the capability of divide-by-256. The '390, 'LS390, '393, and 'LS393 have parallel outputs from each counter stage so that any submultiple of the input count frequency is available for system-timing signals. Series 54 and Series 54LS circuits are characterized for operation over the full military temperature range of -55°C to 125°C; Series 74 and Series 74LS circuits are characterized for operation from 0°C to 70°C.

Each of these monolithic circuits contains eight master-slave flip-flops and additional gating to implement two individual four-bit counters in a single package. The '390 and 'LS390 incorporate dual divide-by-two and divide-by-five counters, which can be used to implement cycle lengths equal to any whole and/or cumulative multiples of 2 and/or 5 up to divide-by-100. When connected as a bi-quinary counter, the separate divide-by-two circuit can be used to provide symmetry (a square wave) at the final output stage. The '393 and 'LS393 each comprise two independent four-bit binary counters each having a clear and a clock input. N-bit binary counters can be implemented with each package providing the capability of divide-by-256. The '390, 'LS390, '393, and 'LS393 have parallel outputs from each counter stage so that any submultiple of the input count frequency is available for system-timing signals. Series 54 and Series 54LS circuits are characterized for operation over the full military temperature range of -55°C to 125°C; Series 74 and Series 74LS circuits are characterized for operation from 0°C to 70°C.