Specification	SN74LVC125APWT

Current - Output High, Low	24 mA
Logic Type	Buffer, Non-Inverting
Mounting Type	Surface Mount
Number of Bits per Element	1
Number of Elements	4
Operating Temperature [Max]	125 °C
Operating Temperature [Min]	-40 °C
Output Type	3-State
Package / Case	14-TSSOP
Package / Case [custom]	0.173 "
Package / Case [custom]	4.4 mm
Supplier Device Package	14-TSSOP
Voltage - Supply [Max]	3.6 V
Voltage - Supply [Min]	1.65 V

SN74LVC125A Series

Four-channel 1.65V-to-3.6V buffers with 3-state outputs

Part	Package / Case [custom]	Package / Case [custom]	Package / Case	Voltage - Supply [Min]	Voltage - Supply [Max]	Current - Output High, Low	Operating Temperature [Min]	Operating Temperature [Max]	Logic Type	Number of Elements	Supplier Device Package	Number of Bits per Element	Mounting Type	Output Type	Package / Case [x]	Package / Case [y]	Package / Case	Package / Case
Texas Instruments SN74LVC125APWRE4	0.173 "	4.4 mm	14-TSSOP	1.65 V	3.6 V	24 mA	-40 °C	125 °C	Buffer Non-Inverting	4	14-TSSOP	1	Surface Mount	3-State
Texas Instruments SN74LVC125APWT	0.173 "	4.4 mm	14-TSSOP	1.65 V	3.6 V	24 mA	-40 °C	125 °C	Buffer Non-Inverting	4	14-TSSOP	1	Surface Mount	3-State
Texas Instruments SN74LVC125ADTG4			14-SOIC	1.65 V	3.6 V	24 mA	-40 °C	125 °C	Buffer Non-Inverting	4		1	Surface Mount	3-State	0.154 in	3.9 mm
Texas Instruments SN74LVC125ADBRG4			14-SSOP	1.65 V	3.6 V	24 mA	-40 °C	125 °C	Buffer Non-Inverting	4	14-SSOP	1	Surface Mount	3-State			5.3 mm	0.209 "
Texas Instruments SN74LVC125APWRG3	0.173 "	4.4 mm	14-TSSOP	1.65 V	3.6 V	24 mA	-40 °C	125 °C	Buffer Non-Inverting	4	14-TSSOP	1	Surface Mount	3-State
Texas Instruments SN74LVC125APWTE4	0.173 "	4.4 mm	14-TSSOP	1.65 V	3.6 V	24 mA	-40 °C	125 °C	Buffer Non-Inverting	4	14-TSSOP	1	Surface Mount	3-State
Texas Instruments SN74LVC125ABQAR			14-WFQFN Exposed Pad	1.65 V	3.6 V	24 mA	-40 °C	125 °C	Buffer Non-Inverting	4	14-WQFN (3x2.5)	1	Surface Mount	3-State
Texas Instruments SN74LVC125ADRE4			14-SOIC	1.65 V	3.6 V	24 mA	-40 °C	125 °C	Buffer Non-Inverting	4		1	Surface Mount	3-State	0.154 in	3.9 mm
Texas Instruments SN74LVC125APWG4	0.173 "	4.4 mm	14-TSSOP	1.65 V	3.6 V	24 mA	-40 °C	125 °C	Buffer Non-Inverting	4	14-TSSOP	1	Surface Mount	3-State
Texas Instruments SN74LVC125ANSR			14-SOIC	1.65 V	3.6 V	24 mA	-40 °C	125 °C	Buffer Non-Inverting	4	14-SO	1	Surface Mount	3-State	0.209 "	5.3 mm

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

Distributor	Package	Quantity	$

Digikey	Cut Tape (CT)	1	$ 1.02
		10	$ 0.91
		25	$ 0.86
		100	$ 0.71
	Digi-Reel®	1	$ 1.02
		10	$ 0.91
		25	$ 0.86
		100	$ 0.71
	Tape & Reel (TR)	250	$ 0.47
		500	$ 0.41
		1250	$ 0.38
Texas Instruments	SMALL T&R	1	$ 0.88
		100	$ 0.59
		250	$ 0.46
		1000	$ 0.30

Description

General part information

SN74LVC125A Series

This quadruple bus buffer gate is designed for 1.65V to 3.6V VCC operation.

The SN74LVC125A device features independent line drivers with 3-state outputs. Each output is disabled when the associated output-enable (OE) input is high.

To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

Documents

Technical documentation and resources

SN74LVC125APWT

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SN74LVC125APWT

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Technical Specifications

SN74LVC125A Series

Pricing

Description

SN74LVC125A Series

Documents

Datasheet

Design Summary for WCSP Little Logic (Rev. B)

CMOS Power Consumption and CPD Calculation (Rev. B)

Little Logic Guide 2018 (Rev. G)

Selecting the Right Level Translation Solution (Rev. A)

LVC Characterization Information

Input and Output Characteristics of Digital Integrated Circuits

Logic Guide (Rev. AB)

16-Bit Widebus Logic Families in 56-Ball, 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B)

Optimizing Optical Network Terminal Units With Logic

Semiconductor Packing Material Electrostatic Discharge (ESD) Protection

Implications of Slow or Floating CMOS Inputs (Rev. E)

Understanding Advanced Bus-Interface Products Design Guide

Optimizing Board Space for Discrete LOGIC Designs Using Smallest Package Solutio (Rev. A)

Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)

TI IBIS File Creation, Validation, and Distribution Processes

Migration From 3.3-V To 2.5-V Power Supplies For Logic Devices

Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A)

Low-Voltage Logic (LVC) Designer's Guide

Texas Instruments Little Logic Application Report

Standard Linear & Logic for PCs, Servers & Motherboards

Signal Switch Data Book (Rev. A)

Live Insertion

STANDARD LINEAR AND LOGIC FOR DVD/VCD PLAYERS

LOGIC Pocket Data Book (Rev. B)

Power-Up 3-State (PU3S) Circuits in TI Standard Logic Devices

How to Select Little Logic (Rev. A)

LVC and LV Low-Voltage CMOS Logic Data Book (Rev. B)

Use of the CMOS Unbuffered Inverter in Oscillator Circuits

SN74LVC125A Series