
SN74S283N
ActiveBINARY FULL ADDER SINGLE-ELEMENT 4-BIT 16-PIN PDIP TUBE
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SN74S283N
ActiveBINARY FULL ADDER SINGLE-ELEMENT 4-BIT 16-PIN PDIP TUBE
Deep-Dive with AI
Technical Specifications
Parameters and characteristics for this part
| Specification | SN74S283N |
|---|---|
| Logic Type | Binary Full Adder with Fast Carry |
| Mounting Type | Through Hole |
| Number of Bits | 4 |
| Operating Temperature [Max] | 70 °C |
| Operating Temperature [Min] | 0 °C |
| Package / Case | 0.3 in |
| Package / Case | 16-DIP |
| Package / Case | 7.62 mm |
| Supplier Device Package | 16-PDIP |
| Supply Voltage [Max] | 5.25 V |
| Supply Voltage [Min] | 4.75 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | Tube | 1 | $ 9.43 | |
| 10 | $ 8.51 | |||
| 25 | $ 8.12 | |||
| 100 | $ 7.05 | |||
| 250 | $ 6.73 | |||
| 500 | $ 6.14 | |||
| 1000 | $ 5.35 | |||
| Texas Instruments | TUBE | 1 | $ 8.29 | |
| 100 | $ 6.76 | |||
| 250 | $ 5.32 | |||
| 1000 | $ 4.51 | |||
Description
General part information
SN74S283 Series
The '283 and 'LS283 adders are electrically and functionally identical to the '83A and 'LS83A, respectively; only the arrangement of the terminals has been changed. The 'S283 high performance versions are also functionally identical.
These improved full adders perform the addition of two 4-bit binary words. The sum () outputs are provided for each bit and the resultant carry (C4) is obtained from the fourth bit. These adders feature full internal look-ahead across all four bits generating the carry term in ten nanoseconds, typically, for the '283 and 'LS283, and 7.5 nanoseconds for the 'S283. This capability provides the system designer with partial look-ahead performance at the economy and reduced package count of a ripple-carry implementation.
The adder logic, including the carry, is implemented in its true form. End around carry can be accomplished without the need for logic or level inversion.
Documents
Technical documentation and resources