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SC70-5
Integrated Circuits (ICs)

CLVC1G126IDCKREP

Active
Texas Instruments

ENHANCED PRODUCT SINGLE 1.65-V TO 5.5-V BUFFER WITH 3-STATE OUTPUTS

SC70-5
Integrated Circuits (ICs)

CLVC1G126IDCKREP

Active
Texas Instruments

ENHANCED PRODUCT SINGLE 1.65-V TO 5.5-V BUFFER WITH 3-STATE OUTPUTS

Technical Specifications

Parameters and characteristics for this part

SpecificationCLVC1G126IDCKREP
Current - Output High, Low [x]32 mA
Current - Output High, Low [y]32 mA
Logic TypeBuffer, Non-Inverting
Mounting TypeSurface Mount
Number of Bits per Element1
Number of Elements1
Operating Temperature [Max]85 °C
Operating Temperature [Min]-40 °C
Output Type3-State
Package / CaseSC-70-5, 5-TSSOP, SOT-353
Supplier Device PackageSC-70-5
Voltage - Supply [Max]5.5 V
Voltage - Supply [Min]1.65 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyCut Tape (CT) 1$ 1.93
10$ 1.74
25$ 1.64
100$ 1.40
250$ 1.31
500$ 1.15
1000$ 0.95
Digi-Reel® 1$ 1.93
10$ 1.74
25$ 1.64
100$ 1.40
250$ 1.31
500$ 1.15
1000$ 0.95
Tape & Reel (TR) 3000$ 0.88
6000$ 0.85
Texas InstrumentsLARGE T&R 1$ 1.86
100$ 1.27
250$ 0.98
1000$ 0.65

Description

General part information

SN74LVC1G126-EP Series

This single bus buffer gate is designed for 1.65-V to 5.5-V VCCoperation.

The SN74LVC1G126 is a single line driver with a 3-state output. The output is disabled when the output-enable (OE) input is low.

To ensure the high-impedance state during power up or power down, OE should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver.

Documents

Technical documentation and resources

Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A)

Application note

CMOS Power Consumption and CPD Calculation (Rev. B)

Application note

Logic Guide (Rev. AB)

Selection guide

SN74LVC1G126-EP datasheet (Rev. A)

Data sheet

Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)

Application note

Understanding Advanced Bus-Interface Products Design Guide

Application note

Implications of Slow or Floating CMOS Inputs (Rev. E)

Application note

Power-Up 3-State (PU3S) Circuits in TI Standard Logic Devices

Application note

Live Insertion

Application note

Standard Linear & Logic for PCs, Servers & Motherboards

More literature

Semiconductor Packing Material Electrostatic Discharge (ESD) Protection

Application note

Low-Voltage Logic (LVC) Designer's Guide

Design guide

16-Bit Widebus Logic Families in 56-Ball, 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B)

Application note

STANDARD LINEAR AND LOGIC FOR DVD/VCD PLAYERS

More literature

Migration From 3.3-V To 2.5-V Power Supplies For Logic Devices

Application note

Use of the CMOS Unbuffered Inverter in Oscillator Circuits

Application note

Input and Output Characteristics of Digital Integrated Circuits

Application note

LVC and LV Low-Voltage CMOS Logic Data Book (Rev. B)

User guide

Signal Switch Data Book (Rev. A)

User guide

TI IBIS File Creation, Validation, and Distribution Processes

Application note

Texas Instruments Little Logic Application Report

Application note

LOGIC Pocket Data Book (Rev. B)

User guide

How to Select Little Logic (Rev. A)

Application note

Little Logic Guide 2018 (Rev. G)

Selection guide

Selecting the Right Level Translation Solution (Rev. A)

Application note

Design Summary for WCSP Little Logic (Rev. B)

Product overview

LVC Characterization Information

Application note