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Technical Specifications
Parameters and characteristics for this part
| Specification | LMK1D1204RGTT |
|---|---|
| Differential - Input:Output [custom] | True |
| Differential - Input:Output [custom] | True |
| Frequency - Max [Max] | 2 GHz |
| Input | HCSL, LVDS, LVCMOS, LVPECL |
| Mounting Type | Surface Mount |
| Number of Circuits | 1 |
| Operating Temperature [Max] | 105 °C |
| Operating Temperature [Min] | -40 °C |
| Output | LVDS |
| Package / Case | 16-VFQFN Exposed Pad |
| Ratio - Input:Output [custom] | 2:4 |
| Supplier Device Package | 16-VQFN (3x3) |
| Type | Clock Buffer |
| Voltage - Supply [Max] | 3.465 V, 2.625 V, 1.89 V |
| Voltage - Supply [Min] | 2.375 V, 1.71 V, 3.135 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | Cut Tape (CT) | 1 | $ 9.88 | |
| 10 | $ 8.93 | |||
| 25 | $ 8.51 | |||
| 100 | $ 7.39 | |||
| Digi-Reel® | 1 | $ 9.88 | ||
| 10 | $ 8.93 | |||
| 25 | $ 8.51 | |||
| 100 | $ 7.39 | |||
| Tape & Reel (TR) | 250 | $ 7.06 | ||
| 500 | $ 6.44 | |||
| 750 | $ 5.70 | |||
| 1250 | $ 5.61 | |||
| 1750 | $ 5.55 | |||
| Texas Instruments | SMALL T&R | 1 | $ 7.57 | |
| 100 | $ 6.17 | |||
| 250 | $ 4.85 | |||
| 1000 | $ 4.11 | |||
Description
General part information
LMK1D1204 Series
The LMK1D120x clock buffer distributes one of two selectable clock inputs (IN0 and IN1) to 4 or 8 pairs of differential LVDS clock outputs (OUT0 through OUT7) with minimum skew for clock distribution. The LMK1D12x family can accept two clock sources into an input multiplexer. The inputs can either be LVDS, LVPECL, LP-HCSL, HCSL, CML or LVCMOS.
The LMK1D12x is specifically designed for driving 50-Ω transmission lines. In case of driving the inputs in single-ended mode, the appropriate bias voltage as shown in must be applied to the unused negative input pin.
The IN_SEL pin selects the input which is routed to the outputs. If this pin is left open, it disables the outputs (logic low). The part supports a fail-safe function. The device further incorporates an input hysteresis which prevents random oscillation of the outputs in the absence of an input signal.
Documents
Technical documentation and resources
