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Integrated Circuits (ICs)

DS50PCI402SQE/NOPB

Active
Texas Instruments

2.5/5.0-GBPS 4-LANE PCI EXPRESS REDRIVER WITH EQUALIZATION AND DE-EMPHASIS

54-pin (NJY) package image
Integrated Circuits (ICs)

DS50PCI402SQE/NOPB

Active
Texas Instruments

2.5/5.0-GBPS 4-LANE PCI EXPRESS REDRIVER WITH EQUALIZATION AND DE-EMPHASIS

Technical Specifications

Parameters and characteristics for this part

SpecificationDS50PCI402SQE/NOPB
ApplicationsPCIe
Data Rate (Max)5 Gbps
Delay Time200 ps
InputCML
Mounting TypeSurface Mount
Number of Channels8
Operating Temperature [Max]85 °C
Operating Temperature [Min]-10 °C
OutputCML
Package / Case54-WFQFN Exposed Pad
Signal ConditioningInput Equalization, Output De-Emphasis
Supplier Device Package54-WQFN (10x5.5)
TypeReDriver, Buffer
Voltage - Supply [Max]2.625 V
Voltage - Supply [Min]2.375 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyCut Tape (CT) 1$ 12.23
10$ 11.24
25$ 10.77
100$ 9.49
Digi-Reel® 1$ 12.23
10$ 11.24
25$ 10.77
100$ 9.49
Tape & Reel (TR) 250$ 7.71
500$ 7.35
750$ 7.21
Texas InstrumentsSMALL T&R 1$ 9.57
100$ 8.36
250$ 6.45
1000$ 5.77

Description

General part information

DS50PCI402 Series

The DS50PCI402 is a low power, 4 lane bidirectional buffer/equalizer designed specifically for PCI Express Gen1 and Gen2 applications. The device performs both receive equalization and transmit de-emphasis, allowing maximum flexibility of physical placement within a system. The receiver is capable of opening an input eye that is completely closed due to inter-symbol interference (ISI) induced by the interconnect medium.

The transmitter de-emphasis level can be set by the user depending on the distance from the DS50PCI402 to the PCI Express endpoint. The DS50PCI402 contains PCI Express specific functions such as Transmit Idle, RX Detection, and Beacon signal pass through.

The device provides automatic receive detection circuitry which controls the input termination impedance. By automatically reflecting the current load impedance seen on the outputs back to the corresponding inputs the DS50PCI402 becomes completely transparent to both the PCIe root complex and endpoint. An internal rate detection circuit is included to detect if an incoming data stream is at Gen2 data rates, and adjusts the de-emphasis on it's output accordingly. The signal conditioning provided by the device allows systems to upgrade from Gen1 data rates to Gen2 without reducing their physical reach. This is true for FR4 applications such as backplanes, as well as cable interconnect.