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ONSEMI MC74LVXT4053DR2G
Integrated Circuits (ICs)

NB4N507ADR2G

Active
ON Semiconductor

CLOCK SYNTHESIZER, 1 OUTPUTS, 3 V TO 5.5 V, -40 °C TO 85 °C, NSOIC-16

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ONSEMI MC74LVXT4053DR2G
Integrated Circuits (ICs)

NB4N507ADR2G

Active
ON Semiconductor

CLOCK SYNTHESIZER, 1 OUTPUTS, 3 V TO 5.5 V, -40 °C TO 85 °C, NSOIC-16

Technical Specifications

Parameters and characteristics for this part

SpecificationNB4N507ADR2G
Differential - Input:OutputNo/Yes
Frequency - Max [Max]200 MHz
InputCrystal, Clock
Mounting TypeSurface Mount
Number of Circuits1
Operating Temperature [Max]85 °C
Operating Temperature [Min]-40 °C
OutputPECL
Package / Case16-SOIC
Package / Case [x]0.154 in
Package / Case [y]3.9 mm
PLLTrue
Ratio - Input:Output [custom]1:1
Supplier Device Package16-SOIC
TypeClock/Frequency Synthesizer
Voltage - Supply [Max]5.5 V
Voltage - Supply [Min]3 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyCut Tape (CT) 1$ 7.37
10$ 6.65
25$ 6.34
100$ 5.51
250$ 5.26
500$ 4.80
1000$ 4.18
Digi-Reel® 1$ 7.37
10$ 6.65
25$ 6.34
100$ 5.51
250$ 5.26
500$ 4.80
1000$ 4.18
Tape & Reel (TR) 2500$ 4.02
NewarkEach (Supplied on Full Reel) 1$ 4.81
3000$ 4.60
6000$ 4.29
12000$ 3.99
18000$ 3.83
30000$ 3.77

Description

General part information

NB4N507A Series

The NB4N507A is a precision clock synthesizer which generates a very low jitter differential PECL output clock. It produces a clock output based on an integer multiple of an input reference frequency.The NB4N507A accepts a standard fundamental mode crystal, using Phase-Locked-Loop (PLL) techniques, will produce output clocks up to 200 MHz. In addition, the PLL circuitry will produce a 50% duty cycle square-wave clock output.The NB4N507A can be programmed to generate a selection of input reference frequency multiples. An exact 155.52 MHz output clock can be generated from a 19.44 MHz crystal and the x8 multiplier selection. The NB4N507A is intended for low output jitter clock generation.