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10-VSON
Integrated Circuits (ICs)

TPS3430WDRCR

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Texas Instruments

WINDOW WATCHDOG TIMER WITH PROGRAMMABLE RESET DELAY

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10-VSON
Integrated Circuits (ICs)

TPS3430WDRCR

Active
Texas Instruments

WINDOW WATCHDOG TIMER WITH PROGRAMMABLE RESET DELAY

Technical Specifications

Parameters and characteristics for this part

SpecificationTPS3430WDRCR
Current - Supply10 µA
Mounting TypeSurface Mount
Operating Temperature [Max]125 °C
Operating Temperature [Min]-40 °C
Package / Case10-VFDFN Exposed Pad
Supplier Device Package10-VSON (3x3)
TypeWatchdog Circuit
Voltage - Supply [Max]6.5 V
Voltage - Supply [Min]1.6 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyCut Tape (CT) 1$ 2.00
10$ 1.80
25$ 1.69
100$ 1.44
250$ 1.36
500$ 1.19
1000$ 0.98
Digi-Reel® 1$ 2.00
10$ 1.80
25$ 1.69
100$ 1.44
250$ 1.36
500$ 1.19
1000$ 0.98
Tape & Reel (TR) 3000$ 0.91
6000$ 0.88
Texas InstrumentsLARGE T&R 1$ 1.50
100$ 1.24
250$ 0.89
1000$ 0.67

Description

General part information

TPS3430 Series

The TPS3430 is a standalone window watchdog timer with programmable watchdog window and programmable watchdog reset delay for a wide variety of applications. The TPS3430 window watchdog achieves 2.5% timing accuracy (typical at 25°C) and the watchdog output (WDO) reset delay can be set by factory-programmed default delay settings, or programmed by an external capacitor. The watchdog can be disabled via the SET pins to avoid undesired watchdog timeouts during the development process or during power on.

The TPS3430 is available in a small 3.00-mm × 3.00-mm, 10-pin VSON package.

The TPS3430 is a standalone window watchdog timer with programmable watchdog window and programmable watchdog reset delay for a wide variety of applications. The TPS3430 window watchdog achieves 2.5% timing accuracy (typical at 25°C) and the watchdog output (WDO) reset delay can be set by factory-programmed default delay settings, or programmed by an external capacitor. The watchdog can be disabled via the SET pins to avoid undesired watchdog timeouts during the development process or during power on.