
87951AYILF
ObsoleteLOW SKEW, 1-TO-9 DIFFERENTIAL-TO-LVCMOS/LVTTL ZERO DELAY BUFFER
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87951AYILF
ObsoleteLOW SKEW, 1-TO-9 DIFFERENTIAL-TO-LVCMOS/LVTTL ZERO DELAY BUFFER
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Technical Specifications
Parameters and characteristics for this part
| Specification | 87951AYILF |
|---|---|
| Differential - Input:Output | Yes/No |
| Divider/Multiplier | Yes/No |
| Frequency - Max [Max] | 180 MHz |
| Input | LVDS, LVHSTL, LVCMOS, LVPECL, LVTTL, HCSL, SSTL |
| Mounting Type | Surface Mount |
| Number of Circuits | 1 |
| Operating Temperature [Max] | 85 °C |
| Operating Temperature [Min] | -40 °C |
| Output | LVCMOS, LVTTL |
| Package / Case | 32-LQFP |
| PLL | Yes with Bypass |
| Ratio - Input:Output [custom] | 2:9 |
| Supplier Device Package | 32-TQFP (7x7) |
| Type | Zero Delay Buffer |
| Voltage - Supply [Max] | 3.465 V |
| Voltage - Supply [Min] | 3.135 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
Description
General part information
87951I Series
The 87951I is a low voltage, low skew 1-to-9 Differential-to-LVCMOS/LVTTL Cock Generator. The CS87951I has two selectable clock inputs. The single ended clock input accepts LVCMOS or LVTTL input levels. The CLK1, nCLK1 pair can accept most standard differential input levels. With output frequencies up to 180MHz, the 87951I is targeted for high performance clock applications. Along with a fully integrated PLL, the 87951I contains frequency configurable outputs and an external feedback input for regenerating clocks with "zero delay".
Documents
Technical documentation and resources
No documents available