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TOREX XC6215B182MR-G
Discrete Semiconductor Products

QS5W2TR

Active
Rohm Semiconductor

BIPOLAR ARRAY, DUAL NPN, 50V, 3A, TSMT ROHS COMPLIANT: YES

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TOREX XC6215B182MR-G
Discrete Semiconductor Products

QS5W2TR

Active
Rohm Semiconductor

BIPOLAR ARRAY, DUAL NPN, 50V, 3A, TSMT ROHS COMPLIANT: YES

Technical Specifications

Parameters and characteristics for this part

SpecificationQS5W2TR
Current - Collector (Ic) (Max) [Max]3 A
Current - Collector Cutoff (Max) [Max]1 µA
DC Current Gain (hFE) (Min) @ Ic, Vce [Min]180 hFE
Frequency - Transition320 MHz
Mounting TypeSurface Mount
Operating Temperature150 °C
Package / CaseSOT-23-5 Thin, TSOT-23-5
Power - Max [Max]1.25 W
Supplier Device PackageTSMT5
Transistor Type2 NPN (Dual) Common Emitter
Vce Saturation (Max) @ Ib, Ic350 mV
Voltage - Collector Emitter Breakdown (Max) [Max]50 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyN/A 20081$ 0.99
NewarkEach (Supplied on Cut Tape) 1$ 0.62
10$ 0.52
25$ 0.47
50$ 0.42
100$ 0.38
250$ 0.33
500$ 0.29
1000$ 0.26

Description

General part information

QS5W2 Series

Devices integrating two transistors are available in ultra-compact packages, suitable for various applications such as pre-amplifier differential amplification circuits, high-frequency oscillators, driver ICs and so forth.

Documents

Technical documentation and resources

Technical Data Sheet EN

Datasheet

How to Use LTspice® Models: Tips for Improving Convergence

Schematic Design & Verification

PCB Layout Thermal Design Guide

Thermal Design

Notes for Calculating Power Consumption:Static Operation

Thermal Design

Method for Monitoring Switching Waveform

Schematic Design & Verification

How to Use LTspice® Models

Schematic Design & Verification

Importance of Probe Calibration When Measuring Power: Deskew

Schematic Design & Verification

Certificate of not containing SVHC under REACH Regulation

Environmental Data

Two-Resistor Model for Thermal Simulation

Thermal Design

Explanation for Marking

Package Information

About Export Regulations

Export Information

Package Dimensions

Package Information

Part Explanation

Application Note

Compliance of the RoHS directive

Environmental Data

Anti-Whisker formation - Transistors

Package Information

Notes for Temperature Measurement Using Thermocouples

Thermal Design

Precautions When Measuring the Rear of the Package with a Thermocouple

Thermal Design

Inner Structure

Package Information

Taping Information

Package Information

Measurement Method and Usage of Thermal Resistance RthJC

Thermal Design

Condition of Soldering / Land Pattern Reference

Package Information

Reliability Test Result

Manufacturing Data

About Flammability of Materials

Environmental Data

QS5W2 ESD Data

Characteristics Data

How to Create Symbols for PSpice Models

Models

Overview of ROHM's Simulation Models(for ICs and Discrete Semiconductors)

Technical Article

Calculation of Power Dissipation in Switching Circuit

Schematic Design & Verification

Temperature derating method for Safe Operating Area (SOA)

Schematic Design & Verification

Basics of Thermal Resistance and Heat Dissipation

Thermal Design

What is a Thermal Model? (Transistor)

Thermal Design

Method for Calculating Junction Temperature from Transient Thermal Resistance Data

Thermal Design

Notes for Temperature Measurement Using Forward Voltage of PN Junction

Thermal Design

Impedance Characteristics of Bypass Capacitor

Schematic Design & Verification

Moisture Sensitivity Level - Transistors

Package Information

QS5W2 Thermal Resistance

Characteristics Data

List of Transistor Package Thermal Resistance

Thermal Design

What Is Thermal Design

Thermal Design

Types and Features of Transistors

Application Note